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功率VDMOSFET終端結構的擊穿特性研究與設計

發(fā)布時間:2018-01-25 20:48

  本文關鍵詞: VDMOSFET 擊穿電壓 最大表面電場峰值 場限環(huán) 場板 終端面積 出處:《西南交通大學》2015年碩士論文 論文類型:學位論文


【摘要】:本論文主要研究內容為功率VDMOSFET終端結構的擊穿特性。對一款700VVDMOSFET終端結構進行了優(yōu)化設計。首先研究了半導體功率器件雪崩擊穿的條件和機制,代入無限大平面結和突變柱狀結的邊界條件得到擊穿電壓的解析方程。通過對無限大平面結的研究,發(fā)現平面結與外延層參數的選取有直接關系,因此可以推導計算出外延層濃度和厚度參數,通過仿真驗證,計算出來的外延層參數與實際的仿真結果誤差很小。突變柱狀結主要用于主結擊穿電壓的研究,結果表明柱狀結的曲率半徑與結的擊穿電壓有直接關系,曲率越小,結的擊穿電壓越高,這也為其他終端技術提供了理論基礎。然后介紹了幾種常見的終端技術,對橫向變摻雜技術做了簡要分析,對場限環(huán)技術,終端場板技術做了詳細分析和仿真驗證。通過改變場限環(huán)結深,場限環(huán)間距,復合場板結構,探究其與終端擊穿特性之間的關系。之后提出了一種高壓功率器件改進場板的方法與設計,通過調節(jié)金屬-多晶硅復合場板結構,使金屬浮空場板的邊緣覆蓋住多晶硅浮空場板的邊緣,最終使場板內部的場強相互削弱,減小表面最大電場;诖死碚,做了一組采用傳統金屬-多晶硅復合場板和改進后的金屬-多晶硅復合場板結構的VDMOSFET終端仿真驗證。通過上文對終端技術的研究,本文設計了一款4個場限環(huán)外加金屬多晶硅復合場板結構的VDMOSFET,通過對外延層參數的優(yōu)化,場限環(huán)位置和個數的選取,金屬-多晶硅復合場板參數的調節(jié),最終在151μm的有效終端長度上設計了一款耐壓為772V的終端結構,在保證相同耐壓前提下比其他文獻中的同類終端節(jié)約芯片面積26%。
[Abstract]:In this thesis, the breakdown characteristics of power VDMOSFET terminal structure are studied. A 700V DMOSFET terminal structure is optimized. Firstly, the semiconductor power device Xue is studied. The condition and mechanism of avalanche breakdown. The analytical equation of breakdown voltage is obtained by inserting boundary conditions of infinite plane junction and abrupt cylindrical junction. Through the study of infinite plane junction, it is found that the plane junction is directly related to the selection of the parameters of the epitaxial layer. Therefore, the parameters of the concentration and thickness of the epitaxial layer can be deduced and calculated. Through simulation, the error between the calculated parameters and the actual simulation results is very small. The abrupt columnar junction is mainly used to study the breakdown voltage of the main junction. The results show that the curvature radius of the cylindrical junction is directly related to the breakdown voltage of the junction. The smaller the curvature, the higher the breakdown voltage of the junction. This also provides a theoretical basis for other terminal technologies. Then several common terminal technologies are introduced. The transverse variable doping technology is briefly analyzed and the field limiting ring technology is analyzed. The terminal field plate technology is analyzed in detail and verified by simulation. By changing the depth of the field limiting ring the distance between the field limiting rings and the composite field plate structure. After exploring the relationship between the breakdown characteristics and the terminal breakdown characteristics, a method and design of improving the field plate of high voltage power device is proposed, and the structure of metal-polycrystalline silicon composite field plate is adjusted. The edge of the metal floating field plate is covered with the edge of the polysilicon floating field plate, and finally the field intensity inside the plate is weakened and the maximum surface electric field is reduced. A group of VDMOSFET terminals with traditional metal-polysilicon composite field board and improved metal-polycrystalline silicon composite field board structure are simulated and verified. Through the research of terminal technology above. In this paper, a VDMOSFETs with four field limiting rings and metal polysilicon composite structure are designed. By optimizing the parameters of the epitaxial layer, the position and the number of the field limiting rings are selected. By adjusting the parameters of metal-polysilicon composite field plate, a terminal structure with a voltage of 772V has been designed on the effective terminal length of 151 渭 m. On the premise of the same voltage, the chip area is saved by 26% compared with the similar terminals in other literatures.
【學位授予單位】:西南交通大學
【學位級別】:碩士
【學位授予年份】:2015
【分類號】:TN386

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