發(fā)布時(shí)間：2018-01-25 20:48

  本文關(guān)鍵詞： VDMOSFET 擊穿電壓 最大表面電場(chǎng)峰值 場(chǎng)限環(huán) 場(chǎng)板 終端面積　出處：《西南交通大學(xué)》2015年碩士論文　論文類型：學(xué)位論文

【摘要】：本論文主要研究?jī)?nèi)容為功率VDMOSFET終端結(jié)構(gòu)的擊穿特性。對(duì)一款700VVDMOSFET終端結(jié)構(gòu)進(jìn)行了優(yōu)化設(shè)計(jì)。首先研究了半導(dǎo)體功率器件雪崩擊穿的條件和機(jī)制,代入無限大平面結(jié)和突變柱狀結(jié)的邊界條件得到擊穿電壓的解析方程。通過對(duì)無限大平面結(jié)的研究,發(fā)現(xiàn)平面結(jié)與外延層參數(shù)的選取有直接關(guān)系,因此可以推導(dǎo)計(jì)算出外延層濃度和厚度參數(shù),通過仿真驗(yàn)證,計(jì)算出來的外延層參數(shù)與實(shí)際的仿真結(jié)果誤差很小。突變柱狀結(jié)主要用于主結(jié)擊穿電壓的研究,結(jié)果表明柱狀結(jié)的曲率半徑與結(jié)的擊穿電壓有直接關(guān)系,曲率越小,結(jié)的擊穿電壓越高,這也為其他終端技術(shù)提供了理論基礎(chǔ)。然后介紹了幾種常見的終端技術(shù),對(duì)橫向變摻雜技術(shù)做了簡(jiǎn)要分析,對(duì)場(chǎng)限環(huán)技術(shù),終端場(chǎng)板技術(shù)做了詳細(xì)分析和仿真驗(yàn)證。通過改變場(chǎng)限環(huán)結(jié)深,場(chǎng)限環(huán)間距,復(fù)合場(chǎng)板結(jié)構(gòu),探究其與終端擊穿特性之間的關(guān)系。之后提出了一種高壓功率器件改進(jìn)場(chǎng)板的方法與設(shè)計(jì),通過調(diào)節(jié)金屬-多晶硅復(fù)合場(chǎng)板結(jié)構(gòu),使金屬浮空?qǐng)霭宓倪吘壐采w住多晶硅浮空?qǐng)霭宓倪吘?最終使場(chǎng)板內(nèi)部的場(chǎng)強(qiáng)相互削弱,減小表面最大電場(chǎng)。基于此理論,做了一組采用傳統(tǒng)金屬-多晶硅復(fù)合場(chǎng)板和改進(jìn)后的金屬-多晶硅復(fù)合場(chǎng)板結(jié)構(gòu)的VDMOSFET終端仿真驗(yàn)證。通過上文對(duì)終端技術(shù)的研究,本文設(shè)計(jì)了一款4個(gè)場(chǎng)限環(huán)外加金屬多晶硅復(fù)合場(chǎng)板結(jié)構(gòu)的VDMOSFET,通過對(duì)外延層參數(shù)的優(yōu)化,場(chǎng)限環(huán)位置和個(gè)數(shù)的選取,金屬-多晶硅復(fù)合場(chǎng)板參數(shù)的調(diào)節(jié),最終在151μm的有效終端長度上設(shè)計(jì)了一款耐壓為772V的終端結(jié)構(gòu),在保證相同耐壓前提下比其他文獻(xiàn)中的同類終端節(jié)約芯片面積26%。
[Abstract]:In this thesis, the breakdown characteristics of power VDMOSFET terminal structure are studied. A 700V DMOSFET terminal structure is optimized. Firstly, the semiconductor power device Xue is studied. The condition and mechanism of avalanche breakdown. The analytical equation of breakdown voltage is obtained by inserting boundary conditions of infinite plane junction and abrupt cylindrical junction. Through the study of infinite plane junction, it is found that the plane junction is directly related to the selection of the parameters of the epitaxial layer. Therefore, the parameters of the concentration and thickness of the epitaxial layer can be deduced and calculated. Through simulation, the error between the calculated parameters and the actual simulation results is very small. The abrupt columnar junction is mainly used to study the breakdown voltage of the main junction. The results show that the curvature radius of the cylindrical junction is directly related to the breakdown voltage of the junction. The smaller the curvature, the higher the breakdown voltage of the junction. This also provides a theoretical basis for other terminal technologies. Then several common terminal technologies are introduced. The transverse variable doping technology is briefly analyzed and the field limiting ring technology is analyzed. The terminal field plate technology is analyzed in detail and verified by simulation. By changing the depth of the field limiting ring the distance between the field limiting rings and the composite field plate structure. After exploring the relationship between the breakdown characteristics and the terminal breakdown characteristics, a method and design of improving the field plate of high voltage power device is proposed, and the structure of metal-polycrystalline silicon composite field plate is adjusted. The edge of the metal floating field plate is covered with the edge of the polysilicon floating field plate, and finally the field intensity inside the plate is weakened and the maximum surface electric field is reduced. A group of VDMOSFET terminals with traditional metal-polysilicon composite field board and improved metal-polycrystalline silicon composite field board structure are simulated and verified. Through the research of terminal technology above. In this paper, a VDMOSFETs with four field limiting rings and metal polysilicon composite structure are designed. By optimizing the parameters of the epitaxial layer, the position and the number of the field limiting rings are selected. By adjusting the parameters of metal-polysilicon composite field plate, a terminal structure with a voltage of 772V has been designed on the effective terminal length of 151 渭 m. On the premise of the same voltage, the chip area is saved by 26% compared with the similar terminals in other literatures.
【學(xué)位授予單位】：西南交通大學(xué)
【學(xué)位級(jí)別】：碩士
【學(xué)位授予年份】：2015
【分類號(hào)】：TN386

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本文編號(hào)：1463663