一種低功耗的雙積分型模數(shù)轉(zhuǎn)換器的設計
發(fā)布時間:2018-01-24 21:26
本文關(guān)鍵詞: 遲滯比較器 雙積分型模數(shù)轉(zhuǎn)換器 自動調(diào)零電路 積分器 出處:《遼寧大學》2015年碩士論文 論文類型:學位論文
【摘要】:隨著集成電路在微電子領域的迅猛發(fā)展,現(xiàn)實中數(shù)字計算和數(shù)字處理電路的應用變得更加廣泛,無論是在高新儀器的設計、無線電通訊領域、各種成像電路系統(tǒng)中,模數(shù)轉(zhuǎn)換器(Analog to digital converter:ADC)是其中重要的組成部分,而且其性能的優(yōu)劣會對所設計的電路產(chǎn)生最直接的影響。所以,我們針對在實際中應用的不同來選擇需要的ADC。首先,介紹了模數(shù)轉(zhuǎn)換器在現(xiàn)代電子技術(shù)中的發(fā)展現(xiàn)狀、地位、作用以及它的發(fā)展前景。其次,本文針對壓力測量和承重等儀器對模數(shù)轉(zhuǎn)換器的需要,對比幾種模數(shù)轉(zhuǎn)換在性能和成本上的差異,本文選擇的是具有高精度、低速、低功耗的雙積分型ADC。再次,介紹了模數(shù)轉(zhuǎn)換器的工作原理,和其不同類型的電路結(jié)構(gòu)和性能差異。最后,對雙積分型模數(shù)轉(zhuǎn)換器電路進行設計和仿真,并得到最終的設計參數(shù)。而要想研究雙積分型ADC,那么就需要先了解其工作原理,分析對比其系統(tǒng)結(jié)構(gòu)的特點與非理想特性。本文在研究過程中,將雙積分型ADC劃為幾個重要的子模塊:即采樣保持電路、積分器、比較器、計數(shù)器、帶隙基準源等各部分,并且在每一部分的電路設計后進行仿真,查看設計得到的電路是否符合設計要求的指標。然后,對設計的電路進行整體仿真,查看與理想轉(zhuǎn)換器之間產(chǎn)生的誤差,并找出產(chǎn)生誤差的原因。本論文在雙積分型ADC電路研究設計有以下幾個特點:一是在積分器設計中引入了自動調(diào)零電路,可以有效的抵消在生產(chǎn)工藝中引起的失調(diào)現(xiàn)象;二是在比較器電路的設計上采用了遲滯比較器,降低電路噪聲對比較器輸出的影響;三是通過電路設計的優(yōu)化,本文設計的雙積分型模數(shù)轉(zhuǎn)換器電路的功耗很低。本文設計的雙積分型ADC指標參照芯片ICL7109為:精度為12 bit,采樣率為9K,輸入電壓范圍為0~5 V,功耗為10 m W。而本文在基于Chrt 35.0um標準CMOS工藝下進行電路設計,通過仿真得到ADC的SNR為70.98,有效位數(shù)為11.5 bit,采樣率為10K,輸入電壓范圍為0~5 V,功耗為1.12 m W,符合設計要求。
[Abstract]:With the rapid development of integrated circuits in the field of microelectronics, the application of digital computing and digital processing circuits has become more and more extensive in the field of the design of high-tech instruments and radio communication. Analog to digital convertor: ac is an important part of various imaging circuit systems. And its performance will have the most direct impact on the design of the circuit. Therefore, we choose the need for ADCs according to the different applications in practice. First of all. This paper introduces the current situation, status, function and development prospect of A / D converter in modern electronic technology. Secondly, this paper aims at the need of A / D converter for pressure measurement and load-bearing instruments. Compared with the differences in performance and cost of several analog-to-digital converters, this paper chooses dual-integral ADCs with high precision, low speed and low power consumption. Thirdly, the working principle of ADC is introduced. And its different types of circuit structure and performance differences. Finally, the design and simulation of the dual integral ADC circuit, and get the final design parameters. Then it is necessary to understand its working principle and analyze and compare the characteristics of its system structure and its non-ideal characteristics. In the course of the research, the dual-integral ADC is divided into several important sub-modules: sample-and-hold circuit. Integrator, comparator, counter, bandgap reference source and other parts, and in each part of the circuit design simulation, to see whether the designed circuit meets the design requirements. Then. The designed circuit is simulated as a whole to see the error between the designed circuit and the ideal converter. And find out the cause of the error. This paper has the following characteristics in the research and design of dual-integral ADC circuit: first, the integration of the introduction of automatic zero adjustment circuit. Can effectively counteract the phenomenon of imbalance in the production process; Second, the hysteresis comparator is used in the design of comparator circuit to reduce the effect of circuit noise on the output of comparator. The third is the optimization of circuit design. The power consumption of the dual integral ADC circuit designed in this paper is very low. The dual integral ADC index reference chip ICL7109 is: the precision is 12 bits and the sampling rate is 9K. The input voltage range is 0 ~ 5 V and the power consumption is 10 MW. The circuit is designed based on Chrt 35.0um standard CMOS process. The simulation results show that the SNR of ADC is 70.98, the effective bit is 11.5 bits, the sampling rate is 10K, the input voltage range is 0 ~ 5 V, and the power consumption is 1.12 MW. Meet the design requirements.
【學位授予單位】:遼寧大學
【學位級別】:碩士
【學位授予年份】:2015
【分類號】:TN792
,
本文編號:1461061
本文鏈接:http://sikaile.net/kejilunwen/dianzigongchenglunwen/1461061.html
最近更新
教材專著