本文關鍵詞： 基準電壓源 超低功耗 低電壓 全金屬氧化物半導體 亞閾值　出處：《西安交通大學學報》2017年08期 　論文類型：期刊論文

【摘要】：針對傳統(tǒng)帶隙基準電源電壓高、功耗高和面積大的問題,提出了一種超低功耗的低電壓全金屬氧化物半導體(MOS)基準電壓源。該基準源通過電壓鉗制使MOS管工作在深亞閾值區(qū),利用亞閾值區(qū)MOS管的閾值電壓差補償熱電勢的溫度特性,同時采用負反饋提高了電壓源的線性度與電源抑制比。整個電壓源電路采用SMIC 0.18μm互補金屬氧化物半導體工藝設計,仿真結果表明:基準電壓源的電源電壓范圍可達0.5~3.3V,線性調整率為0.428%V-1,功耗最低僅為0.41nW;在1.8V電源電壓、-40~125℃溫度范圍內,溫度系數(shù)為4.53×10-6℃-1,輸出電壓為230mV;1kHz下電源抑制比為-60dB,芯片版圖面積為625μm2。該基準電壓源可滿足植入式醫(yī)療、可穿戴設備和物聯(lián)網等系統(tǒng)對芯片的低壓低功耗要求。
[Abstract]:Aiming at the problems of high voltage, high power consumption and large area of traditional bandgap reference power supply. An ultra-low power low voltage all metal oxide semiconductor (MOS) voltage reference source is proposed, which enables the MOS tube to work in the deep subthreshold region through voltage clamping. The temperature characteristics of the thermoelectric potential are compensated by the threshold voltage difference of the MOS tube in the sub-threshold region. At the same time, the linearity of the voltage source and the power supply rejection ratio are improved by negative feedback. The whole voltage source circuit is designed by SMIC 0.18 渭 m complementary metal oxide semiconductor process. The simulation results show that the voltage range of the reference voltage source is up to 0.5V / 3.3V, the linear adjustment rate is 0.428kW / 1, and the minimum power consumption is 0.41nW; The temperature coefficient is 4.53 脳 10 ~ (-6) 鈩，

本文編號：1453802