PMU中高性能DC-DC變換器的設(shè)計(jì)
發(fā)布時(shí)間：2019-01-09 16:45
【摘要】：近年來,隨著半導(dǎo)體工藝的高速發(fā)展,CMOS的最小線寬已經(jīng)進(jìn)入納米量級(jí),相同尺寸的芯片能集成越來越多的晶體管,片上系統(tǒng)SoC(System on Chip)成為行業(yè)發(fā)展的主流。在消費(fèi)類市場,隨著便攜式電子產(chǎn)品的快速普及,人們對(duì)電源類芯片也提出更高,更復(fù)雜的要求。因此設(shè)計(jì)高集成度,高性能的PMU集成芯片成為行業(yè)發(fā)展趨勢(shì),也是行業(yè)的緊迫任務(wù)。本文設(shè)計(jì)了一款適用于PMU(Power Management Unit)集成的DC-DC變換器芯片。針對(duì)如何提高DC-DC變換器的關(guān)鍵性能(包括線性調(diào)整率,負(fù)載調(diào)整率,電源抑制比,效率,動(dòng)態(tài)響應(yīng)速度),提出了電壓前饋電路,全差分偽三型補(bǔ)償電路,雙�？刂齐娐�,自校正電路等技術(shù)手段。其中電壓前饋電路使得系統(tǒng)傳輸函數(shù)不再受輸入電壓變化的影響,提高系統(tǒng)線性調(diào)整率。全差分偽三型補(bǔ)償電路,將一路帶通信號(hào)和一路低通信號(hào)疊加,產(chǎn)生類似傳統(tǒng)三型補(bǔ)償電路的頻率響應(yīng),極大減小所需要的電容電阻值,另外全差分結(jié)構(gòu)提高了電源抑制比,有效抑制了Buck變換器工作時(shí)電源噪聲對(duì)控制電路的影響。PWM/PSM雙模技術(shù)兼顧系統(tǒng)的負(fù)載調(diào)整率和效率,確保了重載PWM模式下的負(fù)載調(diào)整率,在輕載PSM模式下提高了系統(tǒng)的效率。自校正電路直接調(diào)節(jié)占空比大小,以使輸出電壓盡快恢復(fù)到基準(zhǔn)電壓±1%范圍內(nèi),有助于提高變換器的負(fù)載調(diào)整率和DVS響應(yīng)速度。通過仿真驗(yàn)證,本文設(shè)計(jì)的DC-DC變換器工作頻率為2MHz;其輸入電壓為2.7V~4.2V;采用DVS技術(shù),輸出電壓0.7V~1.5V,步進(jìn)25mV可調(diào);輸出電流可達(dá)1A;采用PSM/PWM雙�？刂萍夹g(shù),在輕載下進(jìn)入PSM模式,效率可達(dá)80%以上,在重載下進(jìn)入PWM模式,效率可達(dá)90%以上;利用全差分偽三型補(bǔ)償與自校正電路,重載下負(fù)載調(diào)整率小于1%;利用電壓前饋電路,線性調(diào)整率小于1%。在1 kHz頻率以內(nèi),控制電路電源抑制比提高到116dB。
[Abstract]:In recent years, with the rapid development of semiconductor technology, the minimum linewidth of CMOS has entered the nanometer order of magnitude, the chip of the same size can integrate more and more transistors, and the on-chip system SoC (System on Chip) has become the mainstream of the industry. In the consumer market, with the rapid popularity of portable electronic products, people also put forward higher and more complex requirements for power chips. Therefore, the design of high integration and high performance PMU integrated chips has become the trend of industry development, and is also an urgent task of the industry. A DC-DC converter chip suitable for PMU (Power Management Unit) integration is designed in this paper. Aiming at how to improve the key performance of DC-DC converter (including linear adjustment rate, load adjustment rate, power supply rejection ratio, efficiency, dynamic response speed), the voltage feedforward circuit, fully differential pseudo-three-type compensation circuit and dual-mode control circuit are proposed. Self-tuning circuit and other technical means. The voltage feedforward circuit makes the system transmission function no longer affected by the input voltage change and improves the linear adjustment rate of the system. The fully differential pseudo-three-type compensation circuit superposes one pass signal and one low-pass signal to produce a frequency response similar to that of the traditional three-type compensation circuit, which greatly reduces the required capacitance resistance. In addition, the fully differential structure improves the power supply rejection ratio. The effect of power noise on the control circuit of Buck converter is effectively suppressed. The load adjustment rate and efficiency of the system are considered in PWM/PSM dual-mode technology, which ensures the load adjustment rate in heavy-load PWM mode. The efficiency of the system is improved under the light load PSM mode. The self-tuning circuit directly adjusts the duty cycle in order to restore the output voltage to 鹵1% of the reference voltage as soon as possible, which is helpful to improve the load adjustment rate and the DVS response speed of the converter. The simulation results show that the operating frequency of the DC-DC converter designed in this paper is 2 MHz, the input voltage is 2. 7 V / 4. 2 V, the output voltage is 0. 7 V / 1. 5 V, the step 25mV is adjustable, the output current is up to 1 A by using DVS technology. Using PSM/PWM dual-mode control technology, the efficiency of entering PSM mode under light load can reach more than 80%, and the efficiency of entering PWM mode under heavy load can reach more than 90%. By using fully differential pseudo-triple-type compensation and self-tuning circuit, the load adjustment rate under heavy load is less than 1 and the linear adjustment rate is less than 1 by using voltage feedforward circuit. Within 1 kHz frequency, the power supply rejection ratio of the control circuit is increased to 116 dB.
【學(xué)位授予單位】：電子科技大學(xué)
【學(xué)位級(jí)別】：碩士
【學(xué)位授予年份】：2014
【分類號(hào)】：TM46
本文編號(hào)：2405876
[Abstract]:In recent years, with the rapid development of semiconductor technology, the minimum linewidth of CMOS has entered the nanometer order of magnitude, the chip of the same size can integrate more and more transistors, and the on-chip system SoC (System on Chip) has become the mainstream of the industry. In the consumer market, with the rapid popularity of portable electronic products, people also put forward higher and more complex requirements for power chips. Therefore, the design of high integration and high performance PMU integrated chips has become the trend of industry development, and is also an urgent task of the industry. A DC-DC converter chip suitable for PMU (Power Management Unit) integration is designed in this paper. Aiming at how to improve the key performance of DC-DC converter (including linear adjustment rate, load adjustment rate, power supply rejection ratio, efficiency, dynamic response speed), the voltage feedforward circuit, fully differential pseudo-three-type compensation circuit and dual-mode control circuit are proposed. Self-tuning circuit and other technical means. The voltage feedforward circuit makes the system transmission function no longer affected by the input voltage change and improves the linear adjustment rate of the system. The fully differential pseudo-three-type compensation circuit superposes one pass signal and one low-pass signal to produce a frequency response similar to that of the traditional three-type compensation circuit, which greatly reduces the required capacitance resistance. In addition, the fully differential structure improves the power supply rejection ratio. The effect of power noise on the control circuit of Buck converter is effectively suppressed. The load adjustment rate and efficiency of the system are considered in PWM/PSM dual-mode technology, which ensures the load adjustment rate in heavy-load PWM mode. The efficiency of the system is improved under the light load PSM mode. The self-tuning circuit directly adjusts the duty cycle in order to restore the output voltage to 鹵1% of the reference voltage as soon as possible, which is helpful to improve the load adjustment rate and the DVS response speed of the converter. The simulation results show that the operating frequency of the DC-DC converter designed in this paper is 2 MHz, the input voltage is 2. 7 V / 4. 2 V, the output voltage is 0. 7 V / 1. 5 V, the step 25mV is adjustable, the output current is up to 1 A by using DVS technology. Using PSM/PWM dual-mode control technology, the efficiency of entering PSM mode under light load can reach more than 80%, and the efficiency of entering PWM mode under heavy load can reach more than 90%. By using fully differential pseudo-triple-type compensation and self-tuning circuit, the load adjustment rate under heavy load is less than 1 and the linear adjustment rate is less than 1 by using voltage feedforward circuit. Within 1 kHz frequency, the power supply rejection ratio of the control circuit is increased to 116 dB.
【學(xué)位授予單位】：電子科技大學(xué)
【學(xué)位級(jí)別】：碩士
【學(xué)位授予年份】：2014
【分類號(hào)】：TM46
【相似文獻(xiàn)】
相關(guān)期刊論文 前3條
1 張丹;張雨;;基于LabWindows的直流穩(wěn)壓電源負(fù)載調(diào)整率自動(dòng)測(cè)試系統(tǒng)設(shè)計(jì)[J];儀表技術(shù);2014年07期
2 邵珠雷;;一種5V輸出DC/DC降壓變換器的性能分析[J];科技信息;2013年05期
3 ;[J];;年期
相關(guān)碩士學(xué)位論文 前1條
1 劉雨石;PMU中高性能DC-DC變換器的設(shè)計(jì)[D];電子科技大學(xué);2014年
，本文編號(hào)：2405876
本文鏈接：http://sikaile.net/kejilunwen/dianlilw/2405876.html
最近更新
教材專著
