發(fā)布時(shí)間：2019-01-05 03:28

【摘要】：目前,當(dāng)COMS器件面臨集成工藝技術(shù)尺寸限制,憶阻器作為一種新型的納米級(jí)存儲(chǔ)器件受到了眾多學(xué)者的關(guān)注。低功耗、高速度、高集成度、兼具信息存儲(chǔ)與計(jì)算功能的憶阻器,為信息存儲(chǔ)和超高性能計(jì)算帶來(lái)了前所未有的機(jī)遇。它作為下一代非易失性存儲(chǔ)器中的佼佼者,有望替代如今主流的閃存器件。憶阻器材料相關(guān)物理機(jī)制存在很大分歧,憶阻機(jī)制不清晰,憶阻性能缺乏有效的調(diào)控方法,這些原因限制了憶阻器性能提高和實(shí)用進(jìn)程。雖然目前已有大量實(shí)驗(yàn)研究憶阻器的憶阻特性,并給出了一定的理論模型,但是由于納米尺度下器件內(nèi)部電子運(yùn)輸表征手段匱乏,導(dǎo)致其具體的微觀過(guò)程至今仍沒(méi)有一個(gè)清晰的認(rèn)識(shí),許多地方還存在爭(zhēng)議。因此,從理論計(jì)算模擬的角度出發(fā),開(kāi)展憶阻器電學(xué)基本特性研究,弄清楚憶阻器的阻變機(jī)制仍是目前的研究重點(diǎn)。憶阻單元電學(xué)特性計(jì)算模擬研究將為材料研究和提升憶阻特性奠定理論基礎(chǔ)。第一性原理計(jì)算方法已經(jīng)在材料研究領(lǐng)域得到了廣泛的應(yīng)用,它可以從微觀層面去研究材料的物理特性,更重要的是它一種可行的預(yù)測(cè)材料的電學(xué)特性的有效方法。該方法能夠模擬計(jì)算納米級(jí)器件的結(jié)構(gòu)、缺陷、摻雜等特性,并從電子層面分析計(jì)算模擬結(jié)果,利用計(jì)算結(jié)果對(duì)納米器件的電學(xué)特性進(jìn)行預(yù)測(cè)。因此采用第一性原理計(jì)算研究憶阻器單元的電學(xué)特性,從而分析其憶阻機(jī)制是一個(gè)理想的選擇。本文對(duì)憶阻單元材料的阻變機(jī)理進(jìn)行了一個(gè)詳細(xì)的合理推測(cè),并提出了帶電荷的空位缺陷隨外加電場(chǎng)發(fā)生遷移是導(dǎo)致其發(fā)生阻變行為的主要原因。用計(jì)算軟件Atomistix Tool Kit對(duì)憶阻單元進(jìn)行了摻雜空位缺陷的模型建立�；谖锢砟Ｐ头治�,對(duì)不同電壓下憶阻單元功能層中的空位缺陷位置進(jìn)行了預(yù)測(cè),建立了遵循邊界遷移模型的一系列的雙電極單元器件模型。通過(guò)對(duì)器件的直流I-V特性進(jìn)行計(jì)算分析,對(duì)其阻變行為進(jìn)行了合理的解釋,結(jié)果表明邊界遷移的確會(huì)使器件電阻發(fā)生變化。對(duì)今后實(shí)驗(yàn)以及工藝制備提供了理論參考,也為分析憶阻器件的憶阻機(jī)理提供了理論依據(jù)。
[Abstract]:At present, when the COMS device faces the size limitation of integrated technology, the memory device as a new type of nano-level memory device has attracted many scholars' attention. Low power consumption, high speed, high integration, and information storage and computing functions of the resistor, for information storage and ultra-high performance computing has brought unprecedented opportunities. As a leader in the next generation of non-volatile memory, it is expected to replace the current mainstream flash memory devices. The material related physical mechanism of the resistor is very different, the mechanism of the memory is not clear, and the performance of the memory is short of effective control methods. These reasons limit the performance improvement and the practical process of the resistive device. Although a large number of experiments have been carried out to study the memory characteristics of the device, and a certain theoretical model has been given, the internal electronic transport characterization of the device is scarce at nanometer scale. So far, there is still not a clear understanding of its specific micro-process, and there are still disputes in many places. Therefore, from the point of view of theoretical calculation and simulation, it is still the focus of current research to study the basic electrical characteristics of the resistive device and to find out the resistive mechanism of the resistive device. The simulation study of electrical characteristics of memory units will lay a theoretical foundation for the study of materials and the enhancement of memory characteristics. First-principles calculation method has been widely used in the field of material research. It can study the physical properties of materials from the microscopic level and, more importantly, it is an effective method to predict the electrical properties of materials. This method can simulate and calculate the structure, defect and doping characteristics of nanoscale devices, and analyze the simulation results from the electronic level, and predict the electrical properties of nanodevices by using the calculated results. Therefore, it is an ideal choice to study the electrical characteristics of the resistive unit by first principle calculation and to analyze the mechanism of the resistor. In this paper, the resistance mechanism of the memory element material is inferred in detail, and it is suggested that the migration of the charged vacancy defect with the applied electric field is the main cause of the resistance behavior. The model of doped vacancy defect of the memory unit was established by using the calculation software Atomistix Tool Kit. Based on the physical model analysis, the vacancy defect location in the functional layer of the memory cell at different voltages is predicted, and a series of two-electrode single-component models following the boundary migration model are established. Through the calculation and analysis of the DC I-V characteristics of the device, the resistive behavior of the device is explained reasonably. The results show that the boundary migration does change the resistance of the device. It provides a theoretical reference for future experiments and fabrication, and also provides a theoretical basis for the analysis of the mechanism of the device.
【學(xué)位授予單位】：華中科技大學(xué)
【學(xué)位級(jí)別】：碩士
【學(xué)位授予年份】：2015
【分類(lèi)號(hào)】：TM501

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