HIT太陽電池工藝技術研究
發(fā)布時間：2018-10-09 12:31
【摘要】：在晶硅電池的研究領域當中，創(chuàng)新結構的HIT(Hetero-junction with intrinsic thin film)太陽電池具有結構簡單、制作工藝簡單、高效率、高穩(wěn)定性、低成本等特點。因此，HIT太陽電池吸引著越來越多研究者的興趣。 本文著重研究了HIT太陽電池本征非晶硅層和P型非晶硅層的制備工藝，以及單晶硅襯底的織構和圓滑工藝，同時簡單研究了本征非晶硅厚度和氫處理時間對太陽電池性能的影響。對各項工藝參數(shù)進行了優(yōu)化，，為后續(xù)獲得高效率的HIT太陽電池提供了參考。 采用等離子增強化學氣相淀積(PECVD)制備HIT太陽電池的本征非晶硅層和P型非晶硅層。通過研究不同沉積參數(shù)對薄膜生長速率、光學帶隙、暗電導以及太陽電池開路電壓的影響，對非晶硅層的制備工藝進行了優(yōu)化。本征非晶硅層的沉積參數(shù)優(yōu)化為襯底溫度350℃，硅烷濃度20%，射頻功率4W，本征非晶硅薄膜厚度為3.3nm。P型非晶硅層的沉積參數(shù)優(yōu)化為襯底溫度350℃，硼烷/硅烷比1%，射頻功率8W。對沉積非晶硅層前的單晶硅襯底進行氫處理，氫處理能夠有效鈍化單晶硅襯底表面，為后續(xù)工藝提供良好環(huán)境。氫處理的時間優(yōu)化為40s。優(yōu)化后的工藝制備的太陽電池效率達到15.56%。 采用堿性腐蝕液對單晶硅襯底進行表面織構。通過研究腐蝕溫度、異丙醇(IPA)濃度、氫氧化鈉(NaOH)濃度、腐蝕時間對單晶硅襯底表面反射率的影響，對單晶硅襯底織構的工藝參數(shù)進行了優(yōu)化。單晶硅襯底織構的優(yōu)化參數(shù)為80℃，3vol%IPA，1.1wt%NaOH，22.5min，0.3vol%添加劑�？棙嫼蟮膯尉Ч枰r底反射率為11.68%，在表面形成分布、大小均勻的金字塔狀結構，金字塔結構基底寬度為2-4μm。 對織構后的單晶硅襯底采用酸性溶液進行圓滑處理。研究不同腐蝕時間對單晶硅襯底表面反射率和表面形貌的影響。圓滑工藝的腐蝕時間優(yōu)化為60s。優(yōu)化后的制絨和圓滑工藝對太陽電池的各方面性能都有所提升。
[Abstract]:In the research field of crystalline silicon battery, the innovative HIT (Hetero-junction with intrinsic thin film) solar cell) has the characteristics of simple structure, simple fabrication process, high efficiency, high stability and low cost. Therefore, HIT solar cells are attracting more and more researchers' interest. In this paper, the preparation process of intrinsic amorphous silicon layer and P-type amorphous silicon layer of HIT solar cell, as well as the texture and smooth process of monocrystalline silicon substrate are studied. The effects of intrinsic amorphous silicon thickness and hydrogen treatment time on the performance of solar cells were also studied. The process parameters are optimized to provide a reference for obtaining high efficiency HIT solar cells. The intrinsic amorphous silicon layer and P type amorphous silicon layer of HIT solar cell were prepared by plasma enhanced chemical vapor deposition (PECVD). By studying the effects of different deposition parameters on the growth rate, optical band gap, dark conductance and open circuit voltage of solar cells, the preparation process of amorphous silicon layer was optimized. The deposition parameters of the intrinsic amorphous silicon layer are optimized as follows: substrate temperature 350 鈩
本文編號：2259345
[Abstract]:In the research field of crystalline silicon battery, the innovative HIT (Hetero-junction with intrinsic thin film) solar cell) has the characteristics of simple structure, simple fabrication process, high efficiency, high stability and low cost. Therefore, HIT solar cells are attracting more and more researchers' interest. In this paper, the preparation process of intrinsic amorphous silicon layer and P-type amorphous silicon layer of HIT solar cell, as well as the texture and smooth process of monocrystalline silicon substrate are studied. The effects of intrinsic amorphous silicon thickness and hydrogen treatment time on the performance of solar cells were also studied. The process parameters are optimized to provide a reference for obtaining high efficiency HIT solar cells. The intrinsic amorphous silicon layer and P type amorphous silicon layer of HIT solar cell were prepared by plasma enhanced chemical vapor deposition (PECVD). By studying the effects of different deposition parameters on the growth rate, optical band gap, dark conductance and open circuit voltage of solar cells, the preparation process of amorphous silicon layer was optimized. The deposition parameters of the intrinsic amorphous silicon layer are optimized as follows: substrate temperature 350 鈩
本文編號：2259345
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