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安檢設(shè)備數(shù)據(jù)傳輸電路的設(shè)計與實現(xiàn)

發(fā)布時間:2018-08-09 19:09
【摘要】:近年來,由于公共安全形勢的緊迫性和重要性,安檢設(shè)備大量應(yīng)用于各類公共場所的日;蛘咧卮蠡顒訒r的檢查工作中。其中,X射線安檢設(shè)備應(yīng)用最為廣泛。隨著X射線安檢設(shè)備自身的升級以及檢測技術(shù)的發(fā)展和融合,對安檢系統(tǒng)硬件電路的性能要求逐步提升。本文對安檢系統(tǒng)中的數(shù)據(jù)采集模塊和數(shù)據(jù)傳輸電路進行研究,其中數(shù)據(jù)采集模塊的功能是將探測前端電路的模擬輸出轉(zhuǎn)換為數(shù)字信號,數(shù)據(jù)傳輸電路將這些數(shù)字信號傳送給計算機進行終端成像,從而實現(xiàn)物體判別。數(shù)據(jù)采集模塊選用TI公司的ADS8363芯片來實現(xiàn)。ADS8363是一款雙通道16位逐次逼近型AD芯片,采樣率最高可達1 MHz。詳細介紹了數(shù)據(jù)采集模塊的硬件設(shè)計和邏輯設(shè)計以及硬件電路測試。硬件電路測試又分為單獨模塊測試和聯(lián)合前端探測電路的協(xié)同測試,對電路的功能和工作時序進行了驗證,同時也測試出數(shù)據(jù)采集模塊在兩種狀態(tài)下的轉(zhuǎn)換精度。經(jīng)過對多種傳輸方案的比較分析,并結(jié)合安檢設(shè)備數(shù)據(jù)傳輸電路的需求,數(shù)據(jù)傳輸電路確定以FPGA實現(xiàn)MAC核外加物理層芯片的方案實現(xiàn)網(wǎng)絡(luò)傳輸。根據(jù)網(wǎng)絡(luò)傳輸原理和IEEE802.3協(xié)議,設(shè)計并實現(xiàn)了用于數(shù)據(jù)發(fā)送的以太網(wǎng)MAC層的IP核,并對MAC核的模塊組成及各部分的功能和邏輯設(shè)計進行具體說明,然后對PHY層芯片88E1111的控制邏輯設(shè)計進行了簡要介紹,最后給出重要模塊的仿真結(jié)果和相應(yīng)的分析。
[Abstract]:In recent years, due to the urgency and importance of the public safety situation, the security inspection equipment is widely used in the inspection work of daily or important activities in all kinds of public places. Among them, X-ray inspection equipment is the most widely used. With the upgrading of X-ray security equipment and the development and integration of detection technology, the performance requirements of the hardware circuit of the security inspection system are improved step by step. In this paper, the data acquisition module and the data transmission circuit in the security inspection system are studied. The function of the data acquisition module is to convert the analog output of the detection front-end circuit into the digital signal. The data transmission circuit transmits these digital signals to the computer for terminal imaging, thus realizing object discrimination. The data acquisition module uses TI's ADS8363 chip to realize. ADS8363 is a double channel 16-bit successive approximation AD chip with a sampling rate of up to 1 MHz. The hardware design, logic design and hardware circuit test of data acquisition module are introduced in detail. The hardware circuit test is divided into single module test and joint front-end detection circuit test. The function and working timing of the circuit are verified. At the same time, the conversion accuracy of the data acquisition module in two states is also tested. Through the comparison and analysis of various transmission schemes and the requirements of the data transmission circuit of the security inspection equipment, the data transmission circuit determines that the MAC core and physical layer chip can be used to realize the network transmission with FPGA. According to the principle of network transmission and IEEE802.3 protocol, the IP core of Ethernet MAC layer used for data transmission is designed and implemented. The module composition of MAC core and the function and logic design of each part are explained in detail. Then, the control logic design of PHY chip 88E1111 is briefly introduced. Finally, the simulation results of important modules and corresponding analysis are given.
【學(xué)位授予單位】:東南大學(xué)
【學(xué)位級別】:碩士
【學(xué)位授予年份】:2016
【分類號】:X924.2

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