【摘要】：QPSK調(diào)制和相干解調(diào)具有頻譜利用率高，抗干擾能力強等顯著的優(yōu)點，是現(xiàn)代通信領(lǐng)域重要的調(diào)制解調(diào)方法，在衛(wèi)星及移動通信中廣泛的應(yīng)用。通過對QPSK數(shù)字解調(diào)的原理以及Xilinx嵌入式技術(shù)開發(fā)的研究，本文實現(xiàn)了基于ZedBoard的QPSK數(shù)字解調(diào)和以太網(wǎng)傳輸?shù)脑O(shè)計。該設(shè)計充分利用ZedBoard平臺主芯片Zynq-7000APSoC集28nm7系列FPGA與雙核CortexARMA9于一體的異構(gòu)多核處理器優(yōu)勢，在Zynq的可編程邏輯（PL）端完成載波70MHzQPSK數(shù)字信號采集和相干解調(diào)、解調(diào)后基帶信號在ARM處理器（PS）端采用RTP實時傳輸協(xié)議進行以太網(wǎng)傳輸。論文研究內(nèi)容主要包括以下幾個方面： 對XilinxZynq平臺的配置與啟動進行研究，在ZedBoard中移植了Linux操作系統(tǒng)，并且建立了對應(yīng)Linux系統(tǒng)版本的交叉編譯工具鏈，成功的在ZedBoard平臺中移植了RTP協(xié)議實時傳輸所需的jrtplib-3.7.1庫和jthread-1.2.1庫，以及設(shè)計了本文的軟硬件協(xié)同設(shè)計開發(fā)流程，為本文設(shè)計方案的實施作充分的準備。 結(jié)合QPSK數(shù)字解調(diào)的基本原理，設(shè)計了基于ZedBoard的QPSK數(shù)字解調(diào)和以太網(wǎng)傳輸?shù)南到y(tǒng)框圖，以及根據(jù)解調(diào)的實際需要選擇了ADI公司的AD9467FMC子板作為數(shù)字信號采集板，設(shè)計了采集控制IP核。在MATLAB/Simulink中完成了解調(diào)算法的仿真，利用XilinxSystemGeneratorforDSP工具實現(xiàn)算法仿真到VerilogHDL硬件描述語言的轉(zhuǎn)換，最終將解調(diào)算法封裝成Xilinx嵌入式系統(tǒng)EDK工程中的算法IP核，并且將算法IP核和采集控制IP核以及Zynq的ARM處理器相連，編寫相應(yīng)的驅(qū)動程序，搭建了整個設(shè)計的硬件平臺。 本文針對載波70MHz帶寬10MHz的QPSK調(diào)制信號情況在SystemGenerator中搭建了Costas環(huán)數(shù)字解調(diào)模型，，詳細的介紹了數(shù)控振蕩器（NCO）、環(huán)路濾波器（LF）和低通濾波器的設(shè)計及參數(shù)設(shè)置。設(shè)計了Linux系統(tǒng)下RTP實時傳輸流程，編寫了Linux系統(tǒng)下RTP實時傳輸應(yīng)用程序。最后，完成對Zynq的PS端控制AD子板進行70MHz中頻信號采集的性能測試，和RTP協(xié)議以太網(wǎng)實時傳輸?shù)男阅軠y試，以及分別設(shè)置不同的QPSK信號的載波頻率與本地NCO產(chǎn)生信號的頻差進行Costas環(huán)相干解調(diào)仿真測試，給出了仿真測試結(jié)果。 仿真測試結(jié)果表明，本文的設(shè)計的基于ZedBoard的QPSK數(shù)字解調(diào)和以太網(wǎng)傳輸方案的正確性和可行性。
[Abstract]:QPSK modulation and coherent demodulation have many advantages, such as high spectrum efficiency and strong anti-jamming ability. They are important modulation and demodulation methods in the field of modern communication, and are widely used in satellite and mobile communications. Through the research on the principle of QPSK digital demodulation and the development of Xilinx embedded technology, this paper realizes the design of QPSK digital demodulation and Ethernet transmission based on ZedBoard. This design makes full use of the advantage of heterogeneous multi-core processor which integrates 28nm7 series FPGA and dual-core CortexARMA9 on the main chip Zynq-7000APSoC of ZedBoard platform, and completes the acquisition and coherent demodulation of carrier 70MHzQPSK digital signal in the Zynq programmable logic (PL) terminal. The demodulated baseband signal is transmitted by RTP real-time transmission protocol at the (PS) end of the ARM processor. The main contents of this paper are as follows: the configuration and startup of XilinxZynq platform are studied, the Linux operating system is transplanted in ZedBoard, and the cross-compiling tool chain corresponding to the Linux system version is established. The jrtplib-3.7.1 library and jthread-1.2.1 library needed for real-time transmission of RTP protocol are successfully transplanted into ZedBoard platform, and the software / hardware co-design and development flow of this paper is designed, which makes a full preparation for the implementation of the design scheme in this paper. Combined with the basic principle of QPSK digital demodulation, the system block diagram of QPSK digital demodulation and Ethernet transmission based on ZedBoard is designed. According to the actual needs of demodulation, the AD9467FMC sub-board of ADI Company is selected as the digital signal acquisition board. The acquisition control IP core is designed. The demodulation algorithm is simulated in MATLAB/Simulink, and the conversion from algorithm simulation to VerilogHDL hardware description language is realized by using XilinxSystemGeneratorforDSP tool. Finally, the demodulation algorithm is encapsulated into the IP core in the EDK project of Xilinx embedded system. The algorithm IP core is connected with the acquisition control IP core and the ARM processor of Zynq, and the corresponding driver is written, and the hardware platform of the whole design is built. In this paper, the digital demodulation model of Costas loop is built in SystemGenerator for the QPSK modulation signal of carrier 70MHz bandwidth 10MHz. The design and parameter setting of (NCO), loop filter (LF) and low pass filter of numerical controlled oscillator are introduced in detail. The RTP real-time transmission flow under Linux system is designed, and the RTP real-time transmission application program under Linux system is written. Finally, the performance test of 70MHz if signal acquisition and RTP protocol Ethernet real-time transmission is completed for the PS control AD sub-board of Zynq. The carrier frequency of different QPSK signal and the frequency difference of the local NCO signal are set respectively to carry out the simulation test of Costas ring coherent demodulation. The simulation results are given. The simulation results show that the design of QPSK digital demodulation and Ethernet transmission scheme based on ZedBoard is correct and feasible.
【學位授予單位】：杭州電子科技大學
【學位級別】：碩士
【學位授予年份】：2014
【分類號】：TN911.3;TP393.11

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