FMC模塊化數(shù)據(jù)采集系統(tǒng)硬件設(shè)計與實現(xiàn)
發(fā)布時間：2019-03-18 18:34
【摘要】：隨著高集成化電路和FPGA應(yīng)用的快速發(fā)展,測試系統(tǒng)模塊化架構(gòu)設(shè)計已經(jīng)成為一種趨勢。FMC(FPGA Mezzanine Card)是一種專門針對FPGA所定義的互聯(lián)接口,在模塊化數(shù)據(jù)采集系統(tǒng)的設(shè)計與實現(xiàn)中得到廣泛應(yīng)用。一方面,FMC模塊之間的復(fù)用性和重構(gòu)性為實現(xiàn)多功能數(shù)據(jù)采集系統(tǒng)奠定了基礎(chǔ);另一方面,FMC接口的高速多針特性有助于提升系統(tǒng)的采樣率及帶寬等性能指標(biāo)。因此,基于FMC模塊化構(gòu)架的數(shù)據(jù)采集系統(tǒng)設(shè)計逐漸成為國內(nèi)外學(xué)者研究的熱點。論文基于FMC互聯(lián)技術(shù),設(shè)計了四種型號的FMC采集模塊,分別為FMC3028(雙通道3GSPS/8bits)、FMC1548(雙通道1.5GSPS/8bits)、FMC4214(雙通道400 MSPS/14 bits)和FMC5212(雙通道500 MSPS/12 bits);同時,還設(shè)計了一種能兼容這四種采集模塊的數(shù)據(jù)處理載板。模塊與載板之間在物理互聯(lián)的基礎(chǔ)上,由載板FPGA中的接口邏輯進(jìn)行控制而完成通信;其不同的組合方式可以實現(xiàn)功能特性各異的數(shù)據(jù)采集系統(tǒng),適用于各種高速、高精度采集場合,具有高帶寬、大動態(tài)范圍等優(yōu)勢。FMC采集模塊的兼容性接口邏輯設(shè)計劃分為三種通用功能電路:型號識別及加密電路,采樣時鐘生成電路以及溫度電壓監(jiān)控電路。其中,型號識別及加密電路采的主要功能是識別FMC采集模塊的型號和保護(hù)系統(tǒng)設(shè)計的知識產(chǎn)權(quán);采樣時鐘生成電路的主要功能是通過SPI總線配置采樣時鐘參數(shù),產(chǎn)生相應(yīng)的時鐘供給ADC完成模數(shù)轉(zhuǎn)換;溫度電壓監(jiān)控電路的主要功能是對模塊子板卡的溫度、電壓進(jìn)行采集,并且把數(shù)據(jù)及時傳給上位機(jī)顯示和分析。在載板的數(shù)據(jù)流控方面,首先采用ChipSync技術(shù)實現(xiàn)對并行高速數(shù)據(jù)流的接收和處理;然后調(diào)用FPGA的DDR3 SDRAM存儲控制IP核,完成大數(shù)據(jù)觸發(fā)存儲;最后,通過CPCI標(biāo)準(zhǔn)總線實現(xiàn)與上位機(jī)的命令通信,并完成高速大容量的數(shù)據(jù)流上傳與顯示。最后通過對型號識別及加密、采樣時鐘生成、溫度電壓監(jiān)控、數(shù)據(jù)流接收以及觸發(fā)存儲電路的測試,驗證了各個模塊的功能實現(xiàn);而且,上位機(jī)對采集數(shù)據(jù)的分析結(jié)果表明,每個FMC采集模塊的SNR、SFDR及輸入帶寬等參數(shù)指標(biāo)均到達(dá)了設(shè)計要求。
[Abstract]:With the rapid development of highly integrated circuits and FPGA applications, the modular architecture design of test systems has become a trend. FMC (FPGA Mezzanine Card) is a kind of interconnection interface defined specifically for FPGA. It is widely used in the design and implementation of modular data acquisition system. On the one hand, the reusability and reconfiguration between FMC modules lay the foundation for the realization of multi-function data acquisition system; on the other hand, the high-speed multi-pin characteristic of FMC interface is helpful to improve the sampling rate and bandwidth of the system. Therefore, the design of data acquisition system based on FMC modular architecture has gradually become a hot research topic at home and abroad. Based on FMC interconnection technology, four kinds of FMC acquisition modules are designed, which are FMC3028 (dual channel 3GSPS/8bits), FMC1548 (dual channel 1.5GSPS/8bits), FMC4214 (dual channel 400 MSPS/14 bits) and FMC5212 (dual channel 500 MSPS/12 bits);). At the same time, a data processing board compatible with these four acquisition modules is designed. The communication between the module and the board is controlled by the interface logic of the board FPGA on the basis of physical interconnection. Its different combination mode can realize the data acquisition system with different functions and characteristics, which is suitable for all kinds of high-speed and high-precision acquisition occasions, and has high bandwidth. The compatibility interface logic design of FMC acquisition module is divided into three general functional circuits: model identification and encryption circuit, sampling clock generation circuit and temperature and voltage monitoring circuit. Among them, the main function of model identification and encryption circuit acquisition is to identify the type of FMC acquisition module and protect the intellectual property rights of the system design; The main function of the sampling clock generation circuit is to configure the sampling clock parameters through the SPI bus to generate the corresponding clock to supply the ADC to complete the analog-to-digital conversion. The main function of the temperature and voltage monitoring circuit is to collect the temperature and voltage of the module board and transmit the data to the upper computer in time for display and analysis. In the aspect of data flow control of the board, firstly, the ChipSync technology is used to receive and process the parallel high-speed data stream, and then the DDR3 SDRAM storage control IP core of FPGA is invoked to complete the trigger storage of big data. Finally, the command communication with the host computer is realized by CPCI standard bus, and the high-speed and large-capacity data stream upload and display are completed. Finally, through the model identification and encryption, sampling clock generation, temperature and voltage monitoring, data flow reception and trigger memory circuit test, the realization of each module is verified. Moreover, the analysis of the data collected by the host computer shows that the parameters of each FMC acquisition module, such as SNR,SFDR and input bandwidth, have reached the design requirements.
【學(xué)位授予單位】：電子科技大學(xué)
【學(xué)位級別】：碩士
【學(xué)位授予年份】：2014
【分類號】：TP274.2
本文編號：2443121
[Abstract]:With the rapid development of highly integrated circuits and FPGA applications, the modular architecture design of test systems has become a trend. FMC (FPGA Mezzanine Card) is a kind of interconnection interface defined specifically for FPGA. It is widely used in the design and implementation of modular data acquisition system. On the one hand, the reusability and reconfiguration between FMC modules lay the foundation for the realization of multi-function data acquisition system; on the other hand, the high-speed multi-pin characteristic of FMC interface is helpful to improve the sampling rate and bandwidth of the system. Therefore, the design of data acquisition system based on FMC modular architecture has gradually become a hot research topic at home and abroad. Based on FMC interconnection technology, four kinds of FMC acquisition modules are designed, which are FMC3028 (dual channel 3GSPS/8bits), FMC1548 (dual channel 1.5GSPS/8bits), FMC4214 (dual channel 400 MSPS/14 bits) and FMC5212 (dual channel 500 MSPS/12 bits);). At the same time, a data processing board compatible with these four acquisition modules is designed. The communication between the module and the board is controlled by the interface logic of the board FPGA on the basis of physical interconnection. Its different combination mode can realize the data acquisition system with different functions and characteristics, which is suitable for all kinds of high-speed and high-precision acquisition occasions, and has high bandwidth. The compatibility interface logic design of FMC acquisition module is divided into three general functional circuits: model identification and encryption circuit, sampling clock generation circuit and temperature and voltage monitoring circuit. Among them, the main function of model identification and encryption circuit acquisition is to identify the type of FMC acquisition module and protect the intellectual property rights of the system design; The main function of the sampling clock generation circuit is to configure the sampling clock parameters through the SPI bus to generate the corresponding clock to supply the ADC to complete the analog-to-digital conversion. The main function of the temperature and voltage monitoring circuit is to collect the temperature and voltage of the module board and transmit the data to the upper computer in time for display and analysis. In the aspect of data flow control of the board, firstly, the ChipSync technology is used to receive and process the parallel high-speed data stream, and then the DDR3 SDRAM storage control IP core of FPGA is invoked to complete the trigger storage of big data. Finally, the command communication with the host computer is realized by CPCI standard bus, and the high-speed and large-capacity data stream upload and display are completed. Finally, through the model identification and encryption, sampling clock generation, temperature and voltage monitoring, data flow reception and trigger memory circuit test, the realization of each module is verified. Moreover, the analysis of the data collected by the host computer shows that the parameters of each FMC acquisition module, such as SNR,SFDR and input bandwidth, have reached the design requirements.
【學(xué)位授予單位】：電子科技大學(xué)
【學(xué)位級別】：碩士
【學(xué)位授予年份】：2014
【分類號】：TP274.2
【參考文獻(xiàn)】
相關(guān)碩士學(xué)位論文 前1條
1 黃步岐;具有可重構(gòu)特征的數(shù)據(jù)采集與重放系統(tǒng)設(shè)計[D];電子科技大學(xué);2011年
，本文編號：2443121
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