本文關(guān)鍵詞： 暗硅 熱設(shè)計(jì)功耗 多核系統(tǒng) 動(dòng)態(tài)規(guī)劃 應(yīng)用映射 模擬退火 反饋調(diào)整　出處：《中國(guó)科學(xué)技術(shù)大學(xué)》2017年碩士論文　論文類(lèi)型：學(xué)位論文

【摘要】：集成電路制造工藝的發(fā)展減小了晶體管的特征尺寸,理論上單位面積的芯片可集成更多晶體管而功耗密度保持不變。但是,當(dāng)工藝節(jié)點(diǎn)發(fā)展到22nm以下,泄漏功耗開(kāi)始主導(dǎo)晶體管功耗,并隨著工藝節(jié)點(diǎn)的縮小呈指數(shù)級(jí)增長(zhǎng),這引發(fā)了芯片的過(guò)熱問(wèn)題。業(yè)界預(yù)測(cè):當(dāng)工藝節(jié)點(diǎn)繼續(xù)往前發(fā)展,芯片上將會(huì)有更多的功能模塊不能同時(shí)處于全頻率工作狀態(tài),即總是部分處于開(kāi)啟而其他處于關(guān)閉狀態(tài),這預(yù)示著暗硅時(shí)代的到來(lái)。單核系統(tǒng)的局限性催生了多核系統(tǒng)的發(fā)展,而集成電路向暗硅發(fā)展的趨勢(shì)使系統(tǒng)中的處理器必須合理的開(kāi)斷和配置以緩解熱問(wèn)題。多核系統(tǒng)的資源管理算法可根據(jù)應(yīng)用自身的特點(diǎn),對(duì)芯片中熱設(shè)計(jì)功耗,處理器的開(kāi)啟數(shù)目和工作頻率等資源進(jìn)行合理分配,滿(mǎn)足溫度、系統(tǒng)資源約束的同時(shí)優(yōu)化系統(tǒng)性能。本文在暗硅背景下,面向于共享式存儲(chǔ)結(jié)構(gòu)的同構(gòu)多核系統(tǒng),提出了一種資源管理算法。首先,針對(duì)具有線(xiàn)程并行性的應(yīng)用集,根據(jù)其在不同處理器數(shù)目和工作頻率的功耗及吞吐特性,利用動(dòng)態(tài)規(guī)劃配置處理器數(shù)目和工作頻率,實(shí)現(xiàn)當(dāng)前熱設(shè)計(jì)功耗約束下的系統(tǒng)吞吐最優(yōu)化;其次,以提高散熱效果和降低存取代價(jià)為目標(biāo),使用模擬退火算法完成應(yīng)用映射,確定處理器開(kāi)斷及應(yīng)用在系統(tǒng)中的布局,減小過(guò)熱點(diǎn)出現(xiàn)的幾率,并根據(jù)應(yīng)用布局,通過(guò)溫度仿真獲得系統(tǒng)溫度分布;最后,根據(jù)有無(wú)過(guò)熱點(diǎn)的反饋,充分利用系統(tǒng)溫度裕度,循環(huán)迭代地調(diào)整熱設(shè)計(jì)功耗大小,每次調(diào)整后重新進(jìn)行資源配置和應(yīng)用映射,最終在最大熱設(shè)計(jì)功耗下獲得系統(tǒng)最優(yōu)性能。本文搭建了系統(tǒng)吞吐、功耗及溫度的仿真環(huán)境,使所提資源管理算法可嵌入于該環(huán)境中一體化完成。文中借助多核架構(gòu)仿真工具模擬應(yīng)用在同構(gòu)系統(tǒng)中的執(zhí)行過(guò)程,可獲得應(yīng)用在不同處理器數(shù)目及工作頻率下的吞吐特性。提取系統(tǒng)架構(gòu)參數(shù)和運(yùn)行信息,并轉(zhuǎn)換為功耗仿真工具的輸入文件,便可獲得應(yīng)用功耗特性。以吞吐和功耗特性為輸入,算法在調(diào)整熱設(shè)計(jì)功耗的過(guò)程中,使用溫度仿真工具進(jìn)行熱仿真,并能獲得溫度布局。所搭建環(huán)境可靈活地應(yīng)用于同構(gòu)多核系統(tǒng),實(shí)驗(yàn)表明,所提調(diào)度方法能夠有效的避免過(guò)熱點(diǎn),并優(yōu)化了系統(tǒng)性能,且相比于棋盤(pán)式布局,系統(tǒng)最高溫度降低3%,相比開(kāi)關(guān)式調(diào)整過(guò)熱點(diǎn)的方法,系統(tǒng)吞吐量最大增加約12%。
[Abstract]:The development of integrated circuit manufacturing process reduces the characteristic size of transistors. In theory, more transistors can be integrated into chips per unit area and the power density remains constant. Leakage power starts to dominate transistor power consumption, and increases exponentially as the process node shrinks, causing the chip to overheat. There will be more modules on the chip that can't work at full frequency at the same time, that is, always partially on and off, which bodes well for the advent of the dark silicon era. The limitations of mononuclear systems have spawned the development of multicore systems. The trend of the development of integrated circuits towards dark silicon makes the processors in the system must be switched on and configured reasonably to alleviate the heat problem. The resource management algorithm of multi-core systems can consume the power of thermal design in chips according to the characteristics of the applications. The open number and working frequency of processors are allocated reasonably to satisfy the temperature and system resource constraints and to optimize the system performance. In this paper, an isomorphic multi-core system with shared memory structure is proposed in the background of dark silicon. In this paper, a resource management algorithm is proposed. Firstly, for the application set with thread parallelism, according to the power consumption and throughput characteristics of different processor numbers and working frequencies, dynamic programming is used to configure the number and working frequency of processors. In order to improve the heat dissipation effect and reduce the access cost, simulated annealing algorithm is used to complete the application mapping to determine the switch on and the layout of the processor in the system. According to the application layout, the temperature distribution of the system is obtained by temperature simulation. Finally, according to the feedback of whether there is a hot spot, the system temperature margin is fully utilized, and the power consumption of thermal design is adjusted iteratively and iteratively. Resource configuration and application mapping are redone after each adjustment, and the optimal performance of the system is finally obtained under the maximum thermal design power consumption. In this paper, a simulation environment of system throughput, power consumption and temperature is built. So that the proposed resource management algorithm can be embedded in the environment to be completed. In this paper, the execution process of the application in the isomorphic system is simulated by means of the multi-core architecture simulation tool. It can obtain the throughput characteristics applied in different processor number and working frequency, extract system architecture parameters and operation information, and convert to input file of power emulation tool. With the input of throughput and power consumption characteristics, the algorithm uses the temperature simulation tool to conduct thermal simulation in the process of adjusting the power consumption of thermal design. The environment can be applied to isomorphic multi-core system flexibly. Experiments show that the proposed scheduling method can effectively avoid hot spots and optimize the performance of the system, and compared with the chessboard layout, the proposed scheduling method can be applied to the isomorphic multi-core system flexibly, and compared with the chessboard layout, the proposed scheduling method can effectively avoid the over-hot spots. The maximum temperature of the system is reduced by 3 and the maximum throughput of the system is increased by about 12 percent compared with the switching method of adjusting the hot spot.
【學(xué)位授予單位】：中國(guó)科學(xué)技術(shù)大學(xué)
【學(xué)位級(jí)別】：碩士
【學(xué)位授予年份】：2017
【分類(lèi)號(hào)】：TN405

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本文編號(hào)：1540508