基于FPGA的快速超聲全聚焦成像研究
本文選題:超聲全聚焦成像 切入點(diǎn):橢圓簇軌跡 出處:《西南交通大學(xué)》2017年碩士論文 論文類型:學(xué)位論文
【摘要】:超聲檢測技術(shù)在醫(yī)學(xué)成像,交通運(yùn)輸,無損檢測等領(lǐng)域得到廣泛的應(yīng)用。其中合成孔徑技術(shù)在超聲檢測領(lǐng)域具有高分辨率,高對比度,高靈敏度等特性。全聚焦合成孔徑技術(shù)是合成孔徑技術(shù)中成像最復(fù)雜,分辨率較高的超聲成像技術(shù)。但較高的成像質(zhì)量的缺陷是成像速度慢,常規(guī)計(jì)算機(jī)無法滿足實(shí)時(shí)成像需求,而在很多應(yīng)用場合都需要實(shí)時(shí)成像;谌劢购铣煽讖匠上袼惴ǖ募铀儆(jì)算解決方案成為了研究的熱點(diǎn)。為了提高超聲成像速度,本文引入FPGA作為加速計(jì)算設(shè)備。通過FPGA設(shè)計(jì)實(shí)現(xiàn)32陣元實(shí)時(shí)全聚焦合成孔徑成像。通過對比幾種設(shè)計(jì)模型,討論了基于FPGA的設(shè)計(jì)各個(gè)方案優(yōu)缺點(diǎn)。通過FPGA的設(shè)計(jì)達(dá)到最高效的利用資源的情況下保證成像速度與質(zhì)量。本文首先分析了全聚焦合成孔徑成像算法的原理,并設(shè)計(jì)軟件進(jìn)行算法驗(yàn)證,得到了理想的結(jié)果。對全聚焦成像算法進(jìn)行建模分析,引入橢圓軌跡特征討論全聚焦成像算法分辨率特性,得出結(jié)論成像區(qū)域越深,橫向分辨率越低;跈E圓軌跡特征,采用加權(quán)疊加對成像算法進(jìn)行優(yōu)化,通過實(shí)驗(yàn)分析,成像API指數(shù)下降約26%,有效提高成像分辨率。首先討論全聚焦算法的并行性,分析了基于A掃并行以及基于成像點(diǎn)并行的數(shù)據(jù)處理流,得出結(jié)論基于A掃的并行能更有效的在FPGA上實(shí)現(xiàn)。基于前面的討論以及分析,設(shè)計(jì)了兩種FPGA處理方案,一種是基于距離計(jì)算的處理方案,延時(shí)計(jì)算采用在FPGA上設(shè)計(jì)遞歸距離計(jì)算模塊,再通過索引值轉(zhuǎn)換,然后索引疊加得到成像結(jié)果。實(shí)驗(yàn)顯示FPGA運(yùn)行頻率可達(dá)166.7MHz;诰嚯x計(jì)算的設(shè)計(jì)在頻率上仍然可以提高,通過提高運(yùn)行頻率,可直接提高成像速度。所以本文設(shè)計(jì)了另一種基于距離索引的方案,將距離值存儲(chǔ)于FPGA上的RAM中,通過索引的方式獲取,可簡化電路設(shè)計(jì),提高運(yùn)行頻率。通過分析,距離索引需要占用大量內(nèi)存來存儲(chǔ)距離值,并且為了保證距離精度,需要提高存儲(chǔ)數(shù)據(jù)位寬。本文又對距離索引設(shè)計(jì)進(jìn)行優(yōu)化,通過優(yōu)化設(shè)計(jì),內(nèi)存占用減少80%,并且保證了運(yùn)行頻率。實(shí)驗(yàn)上,本文通過采用PCI-E接口,與FPGA全聚焦處理模塊連接,實(shí)現(xiàn)數(shù)據(jù)的傳輸與處理,然后分析基于FPGA的快速成像方案實(shí)驗(yàn)結(jié)果。對32陣元進(jìn)行全聚焦成像。距離計(jì)算設(shè)計(jì)運(yùn)行頻率為125MHz,成像處理時(shí)間為17毫秒。距離索引的設(shè)計(jì),運(yùn)行頻率可達(dá)250MHz,實(shí)驗(yàn)顯示實(shí)際處理時(shí)間約為9毫秒,相比前一種設(shè)計(jì)處理速度提高了 63%。
[Abstract]:Ultrasonic testing technology has been widely used in medical imaging, transportation, nondestructive testing and other fields. Synthetic aperture technology has high resolution, high contrast in the field of ultrasonic testing. Full focus synthetic aperture technology is the most complex and high resolution ultrasonic imaging technology in synthetic aperture technology, but the defect of higher imaging quality is that the imaging speed is slow. Conventional computer can not meet the need of real-time imaging, but real-time imaging is required in many applications. The accelerated computing solution based on full focus synthetic aperture imaging algorithm has become a hot research topic in order to improve the speed of ultrasonic imaging. In this paper, FPGA is introduced as an accelerated computing device, and 32 array elements real time full focusing synthetic aperture imaging is realized by FPGA design. By comparing several design models, The merits and demerits of each design scheme based on FPGA are discussed. The design of FPGA ensures the imaging speed and quality with the most efficient use of resources. Firstly, the principle of full focus synthetic aperture imaging algorithm is analyzed in this paper. The software is designed to verify the algorithm, and the ideal result is obtained. The full focus imaging algorithm is modeled and analyzed, and the resolution characteristic of the full focus imaging algorithm is discussed by introducing the elliptical trajectory feature. The conclusion is that the deeper the imaging area is, the deeper the imaging area is. The lower the lateral resolution is, the better the imaging algorithm is based on the elliptical trajectory feature, and the weighted superposition is used to optimize the imaging algorithm. Through the experimental analysis, the imaging API exponent is reduced by about 26%, which effectively improves the imaging resolution. Firstly, the parallelism of the full focus algorithm is discussed. This paper analyzes the data processing flow based on A-scan parallelism and imaging point parallelism, and draws a conclusion that A-scan parallelism can be implemented more effectively on FPGA. Based on the previous discussion and analysis, two kinds of FPGA processing schemes are designed. One is the processing scheme based on distance calculation. The delay calculation is based on the design of recursive distance calculation module on FPGA, and then the conversion of index value. The experimental results show that the operating frequency of FPGA can reach 166.7 MHz. The design based on distance calculation can still improve the frequency, by increasing the running frequency, Therefore, another scheme based on distance index is designed in this paper, the distance value is stored in the RAM on FPGA, the circuit design can be simplified and the running frequency can be increased by the way of index. The distance index needs a lot of memory to store the distance value, and in order to ensure the distance precision, it needs to improve the storage data bit width. In this paper, the distance index design is optimized, and the distance index design is optimized. The memory footprint is reduced by 80%, and the running frequency is guaranteed. In experiment, the data transmission and processing are realized by using PCI-E interface and connecting with the FPGA full focus processing module. Then, the experimental results of the fast imaging scheme based on FPGA are analyzed. The full focus imaging of 32 array elements is carried out. The distance calculation design runs at 125 MHz, the imaging processing time is 17 milliseconds, and the distance index is designed. The operating frequency can reach 250 MHz. The experiment shows that the actual processing time is about 9 milliseconds, which is 63 times faster than that of the former design.
【學(xué)位授予單位】:西南交通大學(xué)
【學(xué)位級(jí)別】:碩士
【學(xué)位授予年份】:2017
【分類號(hào)】:TB559
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