線掃描CMOS圖像傳感器讀出電路關(guān)鍵技術(shù)研究
發(fā)布時(shí)間：2019-01-24 21:07
【摘要】：對(duì)于可應(yīng)用于星載地質(zhì)災(zāi)害監(jiān)測(cè)系統(tǒng)的CMOS圖像傳感器,必須要考慮的問題是監(jiān)測(cè)系統(tǒng)相對(duì)于地面的移動(dòng)速度極快,導(dǎo)致圖像傳感器的曝光時(shí)間很短,若采用傳統(tǒng)的面陣凝視型成像方式,必然會(huì)出現(xiàn)圖像的殘影,成像質(zhì)量不佳,因此要采用新的成像方式。目前行業(yè)內(nèi)多采用時(shí)間延遲積分(TDI)形式的線掃描圖像傳感器,通過對(duì)目標(biāo)景物的多次曝光,將信號(hào)進(jìn)行累加,相當(dāng)于增加了曝光時(shí)間,從而提升了圖像信噪比。本文圍繞TDI型CMOS圖像傳感器讀出電路,重點(diǎn)研究了其同步累加時(shí)序方式和提升有效累加級(jí)數(shù)的問題。本文首先根據(jù)該讀出電路的框架對(duì)各個(gè)基本模塊進(jìn)行了分析和仿真,并確定采用具有拼接型光電二極管的3管像素結(jié)構(gòu)作為后續(xù)仿真的基礎(chǔ),其次,為了保證輸出信號(hào)擺幅較大時(shí)能夠有效輸出,采用了軌對(duì)軌形式的輸出緩沖器,該緩沖器能在輸入幅度為1.5V~4V,輸入頻率為2MHz的方波情況下,有效驅(qū)動(dòng)20pF的電容負(fù)載,且失調(diào)電壓小于1mV。接著分析了相關(guān)雙采樣的幾種結(jié)構(gòu),將單端輸出結(jié)構(gòu)修改成雙端輸出結(jié)構(gòu)后應(yīng)用于本文所研究的讀出電路中,以驗(yàn)證運(yùn)放失調(diào)電壓對(duì)于讀出電路的影響,結(jié)果表明,修改后的雙端結(jié)構(gòu)能夠有效抑制失調(diào)電壓對(duì)于讀出電路的影響。最后,重點(diǎn)研究了具有TDI功能的模擬域累加器,通過大量的公式推導(dǎo)證明了該結(jié)構(gòu)的合理性,并通過仿真驗(yàn)證了TDI的同步累加性;隨后針對(duì)有效累加級(jí)數(shù)的問題做了寄生參數(shù)建模,對(duì)原結(jié)構(gòu)進(jìn)行了修改,并通過公式推導(dǎo)證明了該結(jié)構(gòu)的可行性,仿真結(jié)果也表明,修改后的結(jié)構(gòu)有利于提高該模擬域累加器的有效累加級(jí)數(shù)。本文的仿真是基于CSMC 0.5μm的工藝,最終的TDI型CMOS圖像傳感器讀出電路采用的規(guī)模為100級(jí),以便闡述和驗(yàn)證該結(jié)構(gòu)的合理性。其中,渡越時(shí)間即每行的積分時(shí)間定為90μs,最終的仿真表明該累加器線性度為97%。
[Abstract]:For the CMOS image sensor which can be used in the spaceborne geological hazard monitoring system, the problem must be considered is that the monitoring system moves very fast relative to the ground, which results in the very short exposure time of the image sensor. If the traditional plane array staring imaging method is adopted, the residual image will inevitably appear and the imaging quality will be poor. Therefore, a new imaging method should be adopted. At present, the line-scan image sensor in the form of time-delay integral (TDI) is widely used in the industry. Through multiple exposures to the target scene, the signal is accumulated, which is equivalent to increasing the exposure time, thus improving the image signal-to-noise ratio (SNR). Focusing on the readout circuit of TDI type CMOS image sensor, this paper focuses on the problem of synchronously accumulating time sequence and raising effective accumulative series. In this paper, the basic modules are analyzed and simulated according to the frame of the readout circuit, and the three-tube pixel structure with the spliced photodiode is adopted as the basis of subsequent simulation. In order to ensure that the output signal can be effectively output when the amplitude of the output signal is large, the output buffer in the form of rail to rail is adopted. The buffer can effectively drive the capacitance load of 20pF under the condition of the input amplitude of 1.5V / 4V and the input frequency of square wave of 2MHz. The offset voltage is less than 1 MV. Then, several related double sampling structures are analyzed, and the single end output structure is modified to double terminal output structure and applied to the readout circuit studied in this paper to verify the effect of operational amplifier offset voltage on the readout circuit. The results show that, The modified dual-terminal structure can effectively suppress the effect of offset voltage on the readout circuit. Finally, the analog domain accumulator with TDI function is studied, the rationality of the structure is proved by a large number of formula derivation, and the synchronization cumulability of TDI is verified by simulation. Then, the parasitic parameter modeling is done to solve the problem of effective cumulative series, the original structure is modified, and the feasibility of the structure is proved by formula derivation. The simulation results also show that, The modified structure is helpful to improve the effective accumulation series of the analog domain accumulator. The simulation in this paper is based on the process of CSMC 0.5 渭 m, and the final readout circuit of TDI type CMOS image sensor has a scale of 100th in order to explain and verify the rationality of the structure. The transition time, the integral time of each line, is set at 90 渭 s, and the final simulation results show that the linear degree of the accumulator is 97 渭 s.
【學(xué)位授予單位】：電子科技大學(xué)
【學(xué)位級(jí)別】：碩士
【學(xué)位授予年份】：2017
【分類號(hào)】：TP212
本文編號(hào)：2414860
[Abstract]:For the CMOS image sensor which can be used in the spaceborne geological hazard monitoring system, the problem must be considered is that the monitoring system moves very fast relative to the ground, which results in the very short exposure time of the image sensor. If the traditional plane array staring imaging method is adopted, the residual image will inevitably appear and the imaging quality will be poor. Therefore, a new imaging method should be adopted. At present, the line-scan image sensor in the form of time-delay integral (TDI) is widely used in the industry. Through multiple exposures to the target scene, the signal is accumulated, which is equivalent to increasing the exposure time, thus improving the image signal-to-noise ratio (SNR). Focusing on the readout circuit of TDI type CMOS image sensor, this paper focuses on the problem of synchronously accumulating time sequence and raising effective accumulative series. In this paper, the basic modules are analyzed and simulated according to the frame of the readout circuit, and the three-tube pixel structure with the spliced photodiode is adopted as the basis of subsequent simulation. In order to ensure that the output signal can be effectively output when the amplitude of the output signal is large, the output buffer in the form of rail to rail is adopted. The buffer can effectively drive the capacitance load of 20pF under the condition of the input amplitude of 1.5V / 4V and the input frequency of square wave of 2MHz. The offset voltage is less than 1 MV. Then, several related double sampling structures are analyzed, and the single end output structure is modified to double terminal output structure and applied to the readout circuit studied in this paper to verify the effect of operational amplifier offset voltage on the readout circuit. The results show that, The modified dual-terminal structure can effectively suppress the effect of offset voltage on the readout circuit. Finally, the analog domain accumulator with TDI function is studied, the rationality of the structure is proved by a large number of formula derivation, and the synchronization cumulability of TDI is verified by simulation. Then, the parasitic parameter modeling is done to solve the problem of effective cumulative series, the original structure is modified, and the feasibility of the structure is proved by formula derivation. The simulation results also show that, The modified structure is helpful to improve the effective accumulation series of the analog domain accumulator. The simulation in this paper is based on the process of CSMC 0.5 渭 m, and the final readout circuit of TDI type CMOS image sensor has a scale of 100th in order to explain and verify the rationality of the structure. The transition time, the integral time of each line, is set at 90 渭 s, and the final simulation results show that the linear degree of the accumulator is 97 渭 s.
【學(xué)位授予單位】：電子科技大學(xué)
【學(xué)位級(jí)別】：碩士
【學(xué)位授予年份】：2017
【分類號(hào)】：TP212
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1 張智,袁祥輝,黃友恕,呂果林;一種用于大面積CMOS FPA的相關(guān)雙采樣保持電路[J];半導(dǎo)體光電;2003年04期
相關(guān)博士學(xué)位論文 前1條
1 陳西曲;非致冷紅外焦平面的讀出電路及測(cè)試系統(tǒng)研究[D];華中科技大學(xué);2007年
，本文編號(hào)：2414860
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