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基于TDDB效應(yīng)的年齡傳感器技術(shù)研究

發(fā)布時間:2018-10-19 16:50
【摘要】:隨著集成電路制造工藝技術(shù)的不斷進步,器件尺寸快速縮小,電源電壓持續(xù)降低,電路的集成度大大提高,可由此帶來的集成電路老化問題變得日益嚴重。當(dāng)集成電路的特征尺寸低于90nm時,柵氧化層內(nèi)的電場強度急劇增大,與時間相關(guān)的柵介質(zhì)擊穿(TDDB,Time Dependant Dielectric Breakdown)效應(yīng)已經(jīng)成為集成電路芯片的主要老化原因。集成電路行業(yè)更新?lián)Q代很快,電路老化后的芯片性能變差最終會被淘汰,然而這些舊芯片報廢后未被銷毀并重新進入市場。據(jù)報道,市場中的假冒IC芯片數(shù)量不斷上漲,甚至呈指數(shù)增加。由于現(xiàn)今的研究技術(shù)還不夠完善且不適宜用戶使用,這些假冒芯片不易被檢測。本文據(jù)此希望研發(fā)一種可以檢測芯片使用年齡的片上傳感器技術(shù),用于監(jiān)測芯片的使用時間,甄別回收芯片。本文提出的年齡傳感器通過傳感電路監(jiān)測MOS電容的TDDB擊穿,利用壽命模型計算使用年齡。針對柵氧化層TDDB效應(yīng)和集成電路年齡傳感器展開如下研究工作:1.對柵氧氧化層的擊穿機理和幾種主要的TDDB模型進行詳細的分析。采用恒定電壓法,針對TSMC 0.18μm工藝,對寬長比0.22/0.18,柵氧化層厚度為3.56nm的NMOSFET分別進行溫度和電壓應(yīng)力加速實驗,測試其相應(yīng)的擊穿時間。利用不同應(yīng)力下的樣品擊穿時間得到相應(yīng)的柵氧化層累積失效分布圖和特征壽命,并完成V模型中各參數(shù)的提取與驗證工作。2.學(xué)習(xí)研究年齡傳感器的相關(guān)概念與研究成果,利用電路老化的TDDB效應(yīng),提出一種新型的基于冗余預(yù)兆單元的年齡傳感器結(jié)構(gòu)。該傳感器包含應(yīng)力電壓生成電路、待測單元(DUT,Device Under Test)電路和微電流轉(zhuǎn)換電路。相較于以往的年齡傳感器設(shè)計,本文提出的傳感器無需設(shè)置參考電路,只需通過對冗余待測單元(DUT)的TDDB擊穿監(jiān)測,利用NMOSFET的TDDB壽命模型計算出芯片的使用年齡,消除了參考電路帶來的不準確性,因此壽命計算具有更高的準確性。3.設(shè)計所提傳感器結(jié)構(gòu)中的各模塊電路,并利用Cadence Virtuoso仿真工具對電路進行仿真。結(jié)果表明,DUT中處于應(yīng)力條件下的NMOSFET未發(fā)生TDDB擊穿前,電路輸出信號為低電平;發(fā)生TDDB擊穿瞬間,電路監(jiān)測到電流變化,輸出信號變?yōu)楦唠娖?實現(xiàn)了所提年齡傳器中對電路模塊的功能要求。
[Abstract]:With the continuous progress of the integrated circuit manufacturing technology, the device size is rapidly reduced, the power supply voltage continues to decrease, and the integration level of the circuit is greatly improved, which can lead to the aging problem of integrated circuit become more and more serious. When the characteristic size of integrated circuit is lower than that of 90nm, the electric field intensity in gate oxide increases sharply. The TDDB,Time Dependant Dielectric Breakdown) effect has become the main aging reason of IC chip. The IC industry is changing very quickly, and the performance of the chips after circuit aging will eventually be eliminated. However, these old chips have not been destroyed and re-entered the market after they are scrapped. According to reports, the number of counterfeit IC chips in the market continues to rise, or even exponential increase. These fake chips are not easy to detect because the current research technology is not perfect and is not suitable for users. In this paper, we hope to develop an on-chip sensor technology that can detect the age of the chip, which can be used to monitor the life time of the chip and identify the recovery chip. The age sensor proposed in this paper monitors the TDDB breakdown of the MOS capacitor through the sensor circuit, and calculates the age of use by using the life model. The research work of gate oxide TDDB effect and integrated circuit age sensor is as follows: 1. The breakdown mechanism of gate oxide and several main TDDB models are analyzed in detail. Using constant voltage method, the temperature and voltage stress acceleration experiments were carried out for NMOSFET with 3.56nm thickness of 0.22 / 0.18 for TSMC 0.18 渭 m process, and the corresponding breakdown time was measured. The cumulative failure distribution and characteristic life of gate oxide were obtained by using the breakdown time of samples under different stress. The extraction and verification of the parameters in V model were completed. 2. This paper studies the related concepts and achievements of age sensors, and proposes a new age sensor structure based on redundant precursory cells by using the TDDB effect of circuit aging. The sensor includes a stress-voltage generation circuit, a unit to be tested (DUT,Device Under Test) and a micro-current conversion circuit. Compared with the previous age sensor design, the sensor proposed in this paper does not need to set a reference circuit, only need to monitor the TDDB breakdown of the redundant unit to be tested, and use the TDDB lifetime model of NMOSFET to calculate the age of the chip. Eliminate the inaccuracy brought by reference circuit, so life calculation has higher accuracy. 3. Each module circuit in the sensor structure is designed, and the circuit is simulated by Cadence Virtuoso simulation tool. The results show that the output signal of NMOSFET in DUT is low before the TDDB breakdown occurs, and the circuit detects the change of current and the output signal becomes high level when TDDB breakdown occurs. The functional requirements of the circuit module in the proposed age transmitter are realized.
【學(xué)位授予單位】:電子科技大學(xué)
【學(xué)位級別】:碩士
【學(xué)位授予年份】:2017
【分類號】:TP212

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