CMOS圖像傳感器預(yù)處理數(shù)字電路的設(shè)計(jì)與實(shí)現(xiàn)
發(fā)布時(shí)間：2018-08-02 12:45
【摘要】：隨著半導(dǎo)體工藝的提升和革新,對(duì)采用CMOS工藝的圖像傳感器有更加深入的研發(fā)。國(guó)內(nèi)外研究機(jī)構(gòu)和商業(yè)公司對(duì)CMOS圖像傳感器的興趣越來越大,投入的資金也逐年增加。CMOS圖像傳感器芯片作為重要影像采集部件,有著巨大的商業(yè)市場(chǎng),每年增加的市場(chǎng)需求是其廣泛使用的重要原因。CMOS圖像傳感器在在電路集成度和功耗等方面的優(yōu)勢(shì),是CCD圖像傳感器無(wú)法比擬的。這使得CMOS圖像傳感器在移動(dòng)設(shè)備,數(shù)碼相機(jī),行車安全,安防監(jiān)控,航天航空領(lǐng)域的應(yīng)用越來越多,但是CMOS圖像傳感器在成像質(zhì)量和噪聲控制方面還有天生的弱勢(shì)。本論文正是針對(duì)上述問題,將設(shè)計(jì)與實(shí)現(xiàn)的對(duì)象鎖定為CMOS圖像傳感器預(yù)處理數(shù)字電路。首先使用一個(gè)基于FPGA開發(fā)板的平臺(tái)和MIS100X系列的130W像素的CMOS圖像傳感器進(jìn)行圖像采集,采集到的RAW格式圖像數(shù)據(jù)作為算法驗(yàn)證對(duì)象,同時(shí)研究了主流的CMOS圖像傳感器的像素單元,及MIS100X系列圖像傳感器的時(shí)序和驅(qū)動(dòng),以便準(zhǔn)確的采集所需的圖像數(shù)據(jù)。在深入研究分析了CMOS圖像傳感器的像素單元的重要參數(shù),主要噪聲來源,以及推導(dǎo)了相關(guān)的噪聲公式后,重點(diǎn)針對(duì)影響成像質(zhì)量最大因素:暗電流,壞點(diǎn),行噪聲,列方向條紋噪聲問題。在分析已有的抑制方法的優(yōu)缺點(diǎn)的基礎(chǔ)上,分別提出基于數(shù)字電路方式抑制噪聲的方法,并使用芯片采集的RAW數(shù)據(jù),在Matlab軟件中對(duì)方法進(jìn)行了圖像驗(yàn)證,分模塊設(shè)計(jì)了暗電流抑制算法,壞點(diǎn)去除算法,行噪聲抑制算法,列方向條紋噪聲算法,最終結(jié)果均達(dá)到預(yù)期效果。本論文將設(shè)計(jì)好的算法使用Verilog語(yǔ)言實(shí)現(xiàn)了硬件電路的描述,按照數(shù)字電路前端設(shè)計(jì)的流程,分模塊形成了暗電流抑制數(shù)字電路,壞點(diǎn)去除數(shù)字電路,行噪聲抑制電路,列方向條紋噪聲抑制電路的RTL級(jí)代碼,并詳細(xì)說明了每個(gè)模塊的輸入和輸出端口,數(shù)據(jù)流向,功能框圖。最后將寫好的CMOS預(yù)處理電路RTL級(jí)代碼按照流程進(jìn)行了仿真驗(yàn)證,驗(yàn)證平臺(tái)是基于MIS100X系列的芯片的頂層驗(yàn)證平臺(tái)。針對(duì)預(yù)處理電路的功能和時(shí)序制定了驗(yàn)證方案,分模塊和Testcase對(duì)RTL代碼進(jìn)行了仿真,并使用FPGA進(jìn)行了測(cè)試,結(jié)果均達(dá)到了設(shè)計(jì)預(yù)期。
[Abstract]:With the improvement and innovation of semiconductor technology, the image sensor based on CMOS process has been developed more deeply. Domestic and foreign research institutions and commercial companies are more and more interested in CMOS image sensors, and the funds invested are increasing year by year. As an important part of image acquisition, there is a huge commercial market. The increasing market demand every year is an important reason for its wide use. The advantages of CMOS image sensors in circuit integration and power consumption are unparalleled by CCD image sensors. This makes CMOS image sensors more and more used in mobile devices, digital cameras, vehicle safety, security monitoring, aerospace applications, but CMOS image sensors in imaging quality and noise control are inherently weak. In order to solve the above problems, this paper locks the designed and implemented object into a preprocessing digital circuit of CMOS image sensor. Firstly, a platform based on FPGA development board and a 130W pixel CMOS image sensor of MIS100X series are used for image acquisition. The collected image data in RAW format are used as the verification object of the algorithm. At the same time, the pixel unit of the mainstream CMOS image sensor is studied. And MIS100X series image sensor timing and drive, in order to accurately collect the required image data. After deeply studying and analyzing the important parameters of pixel unit of CMOS image sensor, the main noise sources, and deducing the related noise formula, we focus on the most important factors affecting the imaging quality: dark current, bad point, line noise, etc. The problem of directional stripe noise. Based on the analysis of the advantages and disadvantages of the existing suppression methods, the noise suppression methods based on the digital circuit are proposed, and the method is verified in the Matlab software by using the RAW data collected by the chip. The dark current suppression algorithm, the bad point removal algorithm, the row noise suppression algorithm and the column direction stripe noise algorithm are designed in each module, and the final results reach the expected results. In this paper, we use Verilog language to describe the hardware circuit. According to the design flow of the front end of the digital circuit, the dark current suppression digital circuit is formed, the bad point is removed, and the line noise suppression circuit is implemented. The RTL level code of the column direction stripe noise suppression circuit is described in detail. The input and output ports of each module, the direction of the data flow, and the function block diagram are described in detail. Finally, the RTL level code of the CMOS preprocessing circuit is simulated and verified according to the flow chart. The verification platform is the top level verification platform based on the MIS100X series chips. According to the function and timing of the preprocessing circuit, the verification scheme is established. The RTL code is simulated by module and Testcase, and tested by FPGA. The results reach the design expectation.
【學(xué)位授予單位】：電子科技大學(xué)
【學(xué)位級(jí)別】：碩士
【學(xué)位授予年份】：2017
【分類號(hào)】：TP212
本文編號(hào)：2159482
[Abstract]:With the improvement and innovation of semiconductor technology, the image sensor based on CMOS process has been developed more deeply. Domestic and foreign research institutions and commercial companies are more and more interested in CMOS image sensors, and the funds invested are increasing year by year. As an important part of image acquisition, there is a huge commercial market. The increasing market demand every year is an important reason for its wide use. The advantages of CMOS image sensors in circuit integration and power consumption are unparalleled by CCD image sensors. This makes CMOS image sensors more and more used in mobile devices, digital cameras, vehicle safety, security monitoring, aerospace applications, but CMOS image sensors in imaging quality and noise control are inherently weak. In order to solve the above problems, this paper locks the designed and implemented object into a preprocessing digital circuit of CMOS image sensor. Firstly, a platform based on FPGA development board and a 130W pixel CMOS image sensor of MIS100X series are used for image acquisition. The collected image data in RAW format are used as the verification object of the algorithm. At the same time, the pixel unit of the mainstream CMOS image sensor is studied. And MIS100X series image sensor timing and drive, in order to accurately collect the required image data. After deeply studying and analyzing the important parameters of pixel unit of CMOS image sensor, the main noise sources, and deducing the related noise formula, we focus on the most important factors affecting the imaging quality: dark current, bad point, line noise, etc. The problem of directional stripe noise. Based on the analysis of the advantages and disadvantages of the existing suppression methods, the noise suppression methods based on the digital circuit are proposed, and the method is verified in the Matlab software by using the RAW data collected by the chip. The dark current suppression algorithm, the bad point removal algorithm, the row noise suppression algorithm and the column direction stripe noise algorithm are designed in each module, and the final results reach the expected results. In this paper, we use Verilog language to describe the hardware circuit. According to the design flow of the front end of the digital circuit, the dark current suppression digital circuit is formed, the bad point is removed, and the line noise suppression circuit is implemented. The RTL level code of the column direction stripe noise suppression circuit is described in detail. The input and output ports of each module, the direction of the data flow, and the function block diagram are described in detail. Finally, the RTL level code of the CMOS preprocessing circuit is simulated and verified according to the flow chart. The verification platform is the top level verification platform based on the MIS100X series chips. According to the function and timing of the preprocessing circuit, the verification scheme is established. The RTL code is simulated by module and Testcase, and tested by FPGA. The results reach the design expectation.
【學(xué)位授予單位】：電子科技大學(xué)
【學(xué)位級(jí)別】：碩士
【學(xué)位授予年份】：2017
【分類號(hào)】：TP212
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