一種支持變形基2~4 FFT的4路并行訪存方法
[Abstract]:IEEE 802.15.3c is an international standard for high-speed wireless personal area network (high-rate wireless personal area networks,WPANs), which requires 512-point FFT operation in 222.2ns with a sampling frequency of 2.592GHz, which provides a very high standard for FFT processors. In order to meet this requirement, some FFT processors adopt the modified base 2o 4 FFT algorithm and the parallel method of multiple computing units (processing element,PE). In the case of multiple PE parallelism, only the design of storage system that supports the conflicting parallel access operands and the parallel sequential input and output data can give full play to the advantages of parallelism of multiple PE units. According to the rule of accessing operands of 4-channel parallel deformed base 2n4 FFT operation unit, an address translation method supporting 4-channel PE parallel access Operand is designed, and the method supports parallel sequential input and output data. This solves the difficulty of parallel sequential input and output due to the need of bit reverse order operation for data input or output. Finally, the logic synthesis based on the same synthesis constraint condition is carried out. The results show that the proposed method saves 46% area and 28% less power consumption than the previous method, and the method supports continuous data flow (continuous-flow) operations as well as octave operations (in-place).
【作者單位】: 國防科學技術(shù)大學計算機學院;
【基金】:國家自然科學基金項目(61472432)~~
【分類號】:TN92
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