【摘要】：物理不可克隆函數(shù)(Physical Unclonable Function,PUF)是內(nèi)嵌于物理設(shè)備的激勵(lì)與響應(yīng)的映射函數(shù)。它利用制造工藝的可變性,實(shí)現(xiàn)不可克隆、不可預(yù)測(cè)的物理器件唯一特征的標(biāo)志。由于PUF具有不可克隆、不可預(yù)測(cè)等屬性,其適用于密鑰的生成與存儲(chǔ)、系統(tǒng)認(rèn)證和IP核保護(hù)。傳統(tǒng)PUF存在資源效率低,抗噪聲能力不足,唯一性差等缺陷。為了適應(yīng)日益增強(qiáng)的安全需求,PUF成為了硬件安全方面的研究熱點(diǎn)。本文針對(duì)上述問(wèn)題,在前人的研究基礎(chǔ)上做了如下工作:1.將重復(fù)碼的思想引入延時(shí)可變單元,構(gòu)造多重延時(shí)可變單元,提高了資源利用效率,并具有糾錯(cuò)能力,從而增強(qiáng)了抗噪聲能力。利用現(xiàn)有FPGA的延時(shí)環(huán)數(shù)據(jù)庫(kù),構(gòu)建可變延時(shí)模型,對(duì)多重延時(shí)可變單元進(jìn)行仿真,并與相鄰成對(duì)方法和k選1的方法進(jìn)行性能比較。在FPGA上使用CLB實(shí)現(xiàn)多重延時(shí)可變單元,并通過(guò)hard-macro技術(shù),構(gòu)造多重延時(shí)可變?cè)础?.利用差分結(jié)構(gòu)保留源的原始數(shù)據(jù),構(gòu)造差分延時(shí),實(shí)現(xiàn)差分成組,減少系統(tǒng)誤差,提高唯一性。在1的模型上進(jìn)行仿真,并與單環(huán)成組算法進(jìn)行性能比較。3.整理了延時(shí)衰減模型,利用R-D模型分析PUF延時(shí)衰減,比較了模型結(jié)果和HSPICE仿真結(jié)果,兩者基本吻合,模型有效。
[Abstract]:The physical nonclonal function (Physical Unclonable function) is a mapping function of the excitation and response embedded in the physical device. It makes use of the variability of manufacturing process to realize the unique characteristics of uncloned and unpredictable physical devices. Because PUF has the properties of uncloning and unpredictable, it is suitable for key generation and storage, system authentication and IP core protection. The traditional PUF has some defects such as low resource efficiency, insufficient anti-noise ability and poor uniqueness. In order to adapt to the increasing security requirements, PUF has become a research hotspot in hardware security. In order to solve the above problems, this paper has done the following work on the basis of previous studies: 1. The idea of repetitive code is introduced into the delay variable unit to construct the multiplex delay variable unit, which improves the efficiency of resource utilization, and has the ability of correcting errors, thus enhancing the ability of anti-noise. Based on the existing FPGA delay loop database, the variable delay model is constructed, and the performance of the multiplex delay variable unit is compared with the adjacent pairwise method and the k option 1 method. The multiplex delay variable unit is realized by using CLB on FPGA, and the multiplex delay variable source. 2. 2 is constructed by hard-macro technology. By using the original data of the source, the difference delay is constructed, the difference group is realized, the system error is reduced, and the uniqueness is improved. The simulation is carried out on the model of 1, and the performance of the algorithm is compared with that of the single loop group algorithm. 3. 3. The delay attenuation model is arranged and the R-D model is used to analyze the PUF delay attenuation. The results of model and HSPICE simulation are compared. The two models are in good agreement and the model is effective.
【學(xué)位授予單位】：浙江大學(xué)
【學(xué)位級(jí)別】：碩士
【學(xué)位授予年份】：2017
【分類(lèi)號(hào)】：TN918

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1 孫世春;層次優(yōu)化的PUF研究[D];浙江大學(xué);2017年

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本文編號(hào)：2164128