本文選題：多元LDPC碼 + 異構(gòu)計(jì)算��； 參考：《東南大學(xué)》2017年碩士論文

【摘要】：1963年Gallager提出了 LDPC碼概念,同時(shí)也引入了基于模運(yùn)算的多元LDPC碼。1998年,Davey和MacKay將多元LDPC碼擴(kuò)展到高階的有限域GF(q)上。多元LDPC碼在中短碼長(zhǎng)區(qū)域有著卓越的性能,然而過(guò)高的譯碼復(fù)雜度限制了它的實(shí)際應(yīng)用。本文將主要對(duì)多元LDPC碼的構(gòu)造方案,編、解碼器的實(shí)現(xiàn)方案以及多元LDPC碼的應(yīng)用進(jìn)行研究。論文將介紹多元LDPC碼基于消息傳遞的迭代譯碼算法,包括多元乘積求和算法(QSPA),拓展最小和算法(EMS)等,以及基于格型圖的拓展最小和算法(T-EMS)。論文詳細(xì)闡述這幾類算法的具體譯碼步驟,同時(shí)結(jié)合具體的多元LDPC碼碼字進(jìn)行仿真,分析研究參數(shù)優(yōu)化的結(jié)果并綜合比較不同算法的譯碼性能與復(fù)雜度。論文給出一種多元準(zhǔn)循環(huán)原型圖LDPC(NB-QC-PLDPC)碼構(gòu)造方案。首先,論文詳細(xì)描述外附信息轉(zhuǎn)移圖(EXIT)的具體步驟并分析門限值與GF(q)階數(shù)的關(guān)系,為構(gòu)造方案提供理論依據(jù)。接著,論文給出構(gòu)造方案的每個(gè)步驟,包括原型圖結(jié)構(gòu)的優(yōu)化、移位參數(shù)的優(yōu)化放置和非零元組的選擇。論文通過(guò)構(gòu)造具體碼字對(duì)不同編碼方案進(jìn)行分析和比較。在極短碼長(zhǎng)kk = 96,R=0.5情形下,NB-QC-PLDPC碼的性能均優(yōu)于卷積碼、Turbo碼、WiMAX和CCSDS結(jié)構(gòu)的二元LDPC碼,獲得了與Polar相近的性能,相較于Turbo在BLER = 10-3處約有1dB的性能增益。同時(shí),也考慮多種碼長(zhǎng)和高碼率場(chǎng)景,本文構(gòu)造的NB-QC-PLDPC碼均表現(xiàn)出了優(yōu)異的性能。論文實(shí)現(xiàn)基于FPGA的異構(gòu)計(jì)算平臺(tái),提出并實(shí)現(xiàn)具有線性編碼復(fù)雜度碼字的多元LDPC碼編碼器和全并行結(jié)構(gòu)的解碼器。首先,論文給出通過(guò)PCIe接口實(shí)現(xiàn)FPGA與CPU協(xié)同計(jì)算的實(shí)現(xiàn)結(jié)果,系統(tǒng)整體速率最高達(dá)190Mbps,可滿足現(xiàn)有通信系統(tǒng)速率要求。接著,論文給出多元LDPC碼編碼器的設(shè)計(jì)與實(shí)現(xiàn),詳細(xì)闡述編碼器中的關(guān)鍵模塊的原理及實(shí)現(xiàn)方式,包括GF(q)乘法運(yùn)算和編碼過(guò)程兩方面。最后,論文給出全并行的多元LDPC碼解碼器的設(shè)計(jì)及實(shí)現(xiàn),詳細(xì)描繪解碼器中的若干關(guān)鍵模塊及相應(yīng)設(shè)計(jì)框圖,分別為變量節(jié)點(diǎn)、交織節(jié)點(diǎn)和校驗(yàn)節(jié)點(diǎn)處理單元。論文探討在雙向中繼系統(tǒng)的物理層網(wǎng)絡(luò)編碼方案中采用多元LDPC碼譯碼算法,通過(guò)大量仿真驗(yàn)證采用多元LDPC碼譯碼算法的優(yōu)勢(shì)。首先,將中繼端的碼字組合看作一種特殊的多元LDPC碼給出了廣義的聯(lián)合信道譯碼及網(wǎng)絡(luò)編碼算法。接著,針對(duì)中繼端相位異步的問題,論文提出一種符號(hào)預(yù)旋轉(zhuǎn)方案。仿真結(jié)果表明,該方案充分利用多元LDPC碼譯碼算法的糾錯(cuò)能力,大幅提高了最差信道相位情況下整個(gè)雙向中繼系統(tǒng)的通過(guò)率。
[Abstract]:In 1963 Gallager proposed the concept of LDPC codes and introduced multivariate LDPC codes based on modular operations. In 1998 Davey and MacKay extended multivariate LDPC codes to higher-order finite field GFPQ codes. Multivariate LDPC codes have excellent performance in medium and short code length areas, but their practical applications are limited by their high decoding complexity. In this paper, the construction scheme, encoder and decoder scheme of multivariate LDPC codes and the application of multivariate LDPC codes are studied. In this paper, the iterative decoding algorithm based on message passing for multivariate LDPC codes is introduced, including multiple product summation algorithm (QSPAA), extended minimum sum algorithm (EMSS), and extended minimum sum algorithm (T-EMSA) based on trellis graph. In this paper, the detailed decoding steps of these algorithms are described in detail. At the same time, the simulation is carried out with the specific LDPC codewords, and the results of parameter optimization are analyzed and the decoding performance and complexity of different algorithms are compared synthetically. In this paper, a scheme of constructing LDPC-NB-QC-PLDPC code based on multivariate quasi-cyclic prototype graph is presented. Firstly, the paper describes the concrete steps of exiting information transfer graph in detail and analyzes the relationship between threshold value and GFQ order, which provides a theoretical basis for the construction scheme. Then, each step of the construction scheme is given, including the optimization of the prototype graph structure, the optimal placement of shift parameters and the selection of non-zero tuples. This paper analyzes and compares different coding schemes by constructing concrete codewords. The performance of NB-QC-PLDPC code is better than that of convolutional code Turbo code WiMAX and CCSDS structure, and the performance is similar to Polar. Compared with Turbo code at BLER = 10-3, the performance of NB-QC-PLDPC code is similar to that of Polar code. The performance gain of NB-QC-PLDPC code is about 1 dB compared with that of Turbo code at BLER = 10 ~ (-3). At the same time, the NB-QC-PLDPC codes constructed in this paper have excellent performance considering many kinds of code length and high bit rate scenes. In this paper, a heterogeneous computing platform based on FPGA is implemented, and a multivariate LDPC encoder with linear coding complexity and a full parallel decoder are proposed and implemented. First of all, the paper gives the implementation results of FPGA and CPU collaborative computing through PCIe interface. The overall speed of the system is up to 190Mbpss, which can meet the requirements of the existing communication system. Then, the paper gives the design and implementation of the multivariate LDPC encoder. The principle and implementation of the key modules in the encoder are described in detail, including the multiplication operation and the coding process. Finally, the design and implementation of a multivariate LDPC decoder with full parallelism are presented. The key modules and corresponding design block diagrams of the decoder are described in detail, including variable node, interleaved node and check node processing unit. In this paper, the decoding algorithm of multiple LDPC codes in the physical layer network coding scheme of bidirectional relay system is discussed, and the advantages of the decoding algorithm of multiple LDPC codes are verified by a large number of simulations. Firstly, the code-word combination at the relay end is regarded as a special multivariate LDPC code. The generalized joint channel decoding and network coding algorithms are presented. Then, aiming at the asynchronous phase of relay terminal, a symbol prerotation scheme is proposed in this paper. The simulation results show that the scheme makes full use of the error correction ability of the multivariate LDPC decoding algorithm and greatly improves the pass rate of the whole bidirectional relay system under the worst channel phase.
【學(xué)位授予單位】：東南大學(xué)
【學(xué)位級(jí)別】：碩士
【學(xué)位授予年份】：2017
【分類號(hào)】：TN911.22

【相似文獻(xiàn)】

相關(guān)碩士學(xué)位論文 前1條

1 沙小仕;面向5G的多元LDPC碼研究及實(shí)現(xiàn)[D];東南大學(xué);2017年

，

本文編號(hào)：2032822