【摘要】：隨著空間科學(xué)技術(shù)的飛速發(fā)展和對宇宙空間的不斷探索,無線通信數(shù)據(jù)傳輸速度逐漸增大,對傳輸設(shè)備的實(shí)時(shí)性和誤碼率要求越來越高。目前國內(nèi)數(shù)據(jù)傳輸技術(shù)比較落后,并不能達(dá)到衛(wèi)星圖像數(shù)據(jù)高速傳輸?shù)囊?因此有必要對數(shù)據(jù)傳輸系統(tǒng)進(jìn)行研究。調(diào)制解調(diào)技術(shù)是高速無線通信的核心技術(shù)并且也是目前數(shù)據(jù)傳輸系統(tǒng)研究的難點(diǎn)。當(dāng)基帶數(shù)據(jù)速率比較高時(shí),解調(diào)端需要處理更加高速的串行數(shù)據(jù),如果直接運(yùn)行解調(diào)算法就要求數(shù)字芯片有比較豐富的資源和比較高的工作時(shí)鐘,而當(dāng)前比較常用數(shù)字芯片F(xiàn)PGA內(nèi)部工作時(shí)鐘超過400MHz時(shí)很容易產(chǎn)生誤碼,需要對于復(fù)雜的解調(diào)算法并行處理才能滿足高速數(shù)據(jù)傳輸?shù)囊蟆Ｕ撐闹饕獙θ珨?shù)字高速并行QPSK解調(diào)技術(shù)的實(shí)現(xiàn)進(jìn)行研究。首先對調(diào)制解調(diào)原理進(jìn)行詳細(xì)分析和推導(dǎo),其中主要包括數(shù)字下變頻、載波同步、環(huán)路濾波器、數(shù)控振蕩器、基于橫向?yàn)V波器的均衡器等。其次通過對基本調(diào)制解調(diào)算法的推導(dǎo)可得到在解調(diào)運(yùn)算過程中數(shù)字下變頻和低通濾波器需要處理的數(shù)據(jù)最多,并且大部分?jǐn)?shù)據(jù)采用乘法運(yùn)算。乘法運(yùn)算會耗費(fèi)大量資源并且嚴(yán)重影響解調(diào)的速度,為了實(shí)現(xiàn)高速解調(diào)輸出,需要采用并行濾波器來實(shí)現(xiàn)數(shù)據(jù)快速處理。論文中主要介紹了CIC濾波器、時(shí)域并行濾波器,分析了兩種濾波器的優(yōu)缺點(diǎn)和適用范圍。通過對線性卷積和循環(huán)卷積的討論,提出利用卷積的相關(guān)定理和FFT快速算法進(jìn)行頻域并行濾波,其中頻域并行濾波一般可采用兩種方法實(shí)現(xiàn):以線性卷積為基礎(chǔ)的重疊相加法;以循環(huán)卷積為基礎(chǔ)的重疊保留法。然后通過MATLAB/Simulink平臺的對QPSK調(diào)制解調(diào)基本原理進(jìn)行建模仿真,利用Simulink工具中示波器、頻譜儀、信號源等模塊對仿真模型功能驗(yàn)證,得到硬件實(shí)現(xiàn)的關(guān)鍵參數(shù)。最后編寫Verilog硬件并行解調(diào)程序?qū)τ布到y(tǒng)實(shí)時(shí)測試和分析,通過觀察信號頻譜圖、眼圖、星座圖等表明利用FPGA規(guī)模換取處理速度,可以實(shí)現(xiàn)高速信號解調(diào)輸出,并且整個(gè)硬件設(shè)計(jì)比較簡單,具有較高的解調(diào)性能。綜上,通過對高速并行QPSK調(diào)制解調(diào)等相關(guān)原理進(jìn)行研究和分析,利用MATLAB/Simulink建模與仿真,編寫硬件Verilog程序進(jìn)行在線實(shí)時(shí)測試和分析,測試結(jié)果表明基于FPGA的高速并行解調(diào)技術(shù)可以達(dá)到相關(guān)指標(biāo)要求,大幅度提高了硬件解調(diào)速率,對今后進(jìn)一步研究具有非常重要的意義。
[Abstract]:With the rapid development of space science and technology and the continuous exploration of space, the transmission speed of wireless communication data is increasing gradually, and the real-time performance and bit error rate (BER) of transmission equipment are required more and more. At present, domestic data transmission technology is relatively backward, and can not meet the requirements of high-speed transmission of satellite image data, so it is necessary to study the data transmission system. Modulation and demodulation technology is the core technology of high-speed wireless communication and is also the difficulty of data transmission system research. When the baseband data rate is relatively high, the demodulator needs to deal with more high speed serial data. If the demodulation algorithm is run directly, the digital chip will have more abundant resources and higher working clock. At present, when the internal working clock of FPGA exceeds 400MHz, it is easy to generate error code. It needs parallel processing of complex demodulation algorithm to meet the requirements of high-speed data transmission. In this paper, the implementation of all-digital high-speed parallel QPSK demodulation technology is studied. Firstly, the principle of modulation and demodulation is analyzed and deduced in detail, including digital down conversion, carrier synchronization, loop filter, numerical control oscillator, equalizer based on transversal filter and so on. Secondly, through the derivation of the basic modulation and demodulation algorithm, we can get the most data that digital down conversion and low pass filter need to deal with in the process of demodulation operation, and most of the data use multiplication operation. Multiplication will consume a lot of resources and seriously affect the speed of demodulation. In order to achieve high-speed demodulation output, parallel filter is needed to achieve fast data processing. In this paper, CIC filter and time domain parallel filter are introduced, and the advantages, disadvantages and applicable range of the two filters are analyzed. Based on the discussion of linear convolution and cyclic convolution, the parallel filtering in frequency domain is proposed by using the correlation theorem of convolution and FFT fast algorithm, in which the parallel filtering in frequency domain can be realized by two methods: overlapping addition method based on linear convolution; Overlapping retention method based on cyclic convolution. Then the basic principle of QPSK modulation and demodulation is modeled and simulated by MATLAB/Simulink platform. The function of the simulation model is verified by oscilloscope, spectrometer, signal source and other modules in Simulink tool, and the key parameters of hardware implementation are obtained. Finally, the Verilog hardware parallel demodulation program is compiled to test and analyze the hardware system in real time. By observing the signal spectrum diagram, eye diagram, constellation diagram and so on, it is shown that the high speed signal demodulation output can be realized by using FPGA scale in exchange for processing speed. And the whole hardware design is relatively simple, with high demodulation performance. In summary, through the research and analysis of the related principles of high-speed parallel QPSK modulation and demodulation, using MATLAB/Simulink modeling and simulation, the hardware Verilog program is written for on-line real-time test and analysis. The test results show that the high speed parallel demodulation technology based on FPGA can meet the requirements of the relevant indexes and greatly improve the hardware demodulation rate, which is of great significance for further research in the future.
【學(xué)位授予單位】：西安電子科技大學(xué)
【學(xué)位級別】：碩士
【學(xué)位授予年份】：2014
【分類號】：TN911.3

【共引文獻(xiàn)】

相關(guān)期刊論文 前10條

1 于姝,李開成;OFDM技術(shù)性能仿真[J];北方交通大學(xué)學(xué)報(bào);2004年03期

2 趙耀紅;;MP定位系統(tǒng)的設(shè)計(jì)與實(shí)現(xiàn)[J];長春大學(xué)學(xué)報(bào);2008年10期

3 馬玉靜;;MATLAB的通信系統(tǒng)仿真的應(yīng)用[J];長春大學(xué)學(xué)報(bào);2009年02期

4 程菊花,姜武;基于MATLAB的PCM調(diào)制系統(tǒng)的仿真與分析[J];浙江傳媒學(xué)院學(xué)報(bào);2005年03期

5 肖閩進(jìn);基于TMS320C54X的數(shù)字變頻器DSP實(shí)現(xiàn)[J];常州工學(xué)院學(xué)報(bào);2003年04期

6 陸洪;潘威炎;;海浪對水下甚低頻最小頻移鍵控信號解調(diào)的影響[J];電波科學(xué)學(xué)報(bào);2011年04期

7 符策;二進(jìn)制移頻鍵控在數(shù)字通信中的解調(diào)[J];大連海事大學(xué)學(xué)報(bào);2003年03期

8 屈霞;馬冬梅;;《通信原理》實(shí)踐教學(xué)的改革探索[J];電腦知識與技術(shù);2009年21期

9 徐立軍;;波形信道的建模與仿真[J];電腦知識與技術(shù);2009年31期

10 李玲玲;;幾個(gè)檢錯(cuò)碼和分組碼技術(shù)詳解[J];電腦知識與技術(shù);2010年02期

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1 吳利平;復(fù)雜電磁環(huán)境下的信號檢測與估計(jì)關(guān)鍵技術(shù)[D];西安電子科技大學(xué);2011年

2 叢犁;基于博弈論的無線網(wǎng)絡(luò)資源分配策略研究[D];西安電子科技大學(xué);2011年

3 丁漢清;認(rèn)知無線電頻譜感知技術(shù)研究[D];西安電子科技大學(xué);2011年

4 孫德春;無線通信系統(tǒng)協(xié)作傳輸和信道互易性問題研究[D];西安電子科技大學(xué);2012年

5 劉鵬;自私性無線節(jié)點(diǎn)協(xié)作中繼的博弈策略研究[D];中國礦業(yè)大學(xué);2012年

6 宋婧;無線中繼網(wǎng)絡(luò)中資源優(yōu)化分配策略的研究[D];西安電子科技大學(xué);2012年

7 張穎慧;無線中繼協(xié)作系統(tǒng)異步分集與信道估計(jì)研究[D];北京郵電大學(xué);2015年

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1 黃晶晶;基于球形譯碼算法的MIMO系統(tǒng)均衡技術(shù)[D];南昌航空大學(xué);2010年

2 王卓剛;基于改進(jìn)的SCR算法的NBI抑制技術(shù)研究[D];哈爾濱工程大學(xué);2010年

3 張倍榮;多徑信道下的IR-UWB同步捕獲算法研究[D];哈爾濱工程大學(xué);2010年

4 鄭強(qiáng);基于小波變換的VWDK已調(diào)信號抑噪技術(shù)研究[D];哈爾濱工程大學(xué);2010年

5 梁釗;基于IPSTAR的應(yīng)急通信系統(tǒng)研究與應(yīng)用[D];大連海事大學(xué);2010年

6 張文兵;電子不停車收費(fèi)系統(tǒng)智能電源的設(shè)計(jì)[D];蘇州大學(xué);2010年

7 張國強(qiáng);TD-SCDMA系統(tǒng)中聯(lián)合檢測算法的研究[D];天津理工大學(xué);2010年

8 彭華廈;基于FPGA的數(shù)字光端機(jī)的研制[D];中南林業(yè)科技大學(xué);2007年

9 靳曉光;用于電力電子系統(tǒng)的光纖隔離實(shí)時(shí)采樣與傳輸模塊[D];浙江大學(xué);2011年

10 郭賀;戰(zhàn)場偵察MIMO雷達(dá)關(guān)鍵技術(shù)研究[D];電子科技大學(xué);2011年

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本文編號：2474134