基于多核DSP與FPGA的雷達(dá)信號(hào)處理板設(shè)計(jì)
發(fā)布時(shí)間:2018-10-17 20:35
【摘要】:雷達(dá)技術(shù)以及數(shù)字信號(hào)處理技術(shù)的不斷發(fā)展,使得人們對(duì)雷達(dá)信號(hào)處理板的性能要求越來(lái)越高,般的雷達(dá)信號(hào)處理板已經(jīng)不能滿足時(shí)下的需求。在不斷提升的系統(tǒng)性能要求下,本文論述了款高性能雷達(dá)數(shù)字信號(hào)處理板的設(shè)計(jì)。 本文介紹了塊基于多核DSP與FPGA的雷達(dá)信號(hào)處理板卡,該板卡包含片Xilinx V6FPGA和四片高性能多核DSP芯片TMS320C6678,,數(shù)據(jù)處理性能十分卓越。其中TMS320C6678集成了SRIO、PCIe、 Hyperlink等高速串行接口,能完成高速的數(shù)據(jù)傳輸。首先文中經(jīng)過(guò)充分的評(píng)估,完成了板卡的電源模塊、時(shí)鐘模塊以及接口模塊的系統(tǒng)設(shè)計(jì),然后對(duì)板卡上的核心電路作出解釋和說(shuō)明。在最后的調(diào)試部分,本文著重介紹了TMS320C6678的SPI程序加載以及FPGA的千兆以太網(wǎng)調(diào)試工作。整個(gè)板卡架構(gòu)設(shè)計(jì)考慮到算法的映射,便于雷達(dá)信號(hào)處理,同時(shí)兼顧到板卡之間的互聯(lián)。
[Abstract]:With the continuous development of radar technology and digital signal processing technology, the performance of radar signal processing board is becoming more and more demanding, and the radar signal processing board can not meet the current demand. In this paper, the design of high performance radar digital signal processing board is discussed. This paper introduces a radar signal processing board based on multi-core DSP and FPGA. The board consists of Xilinx V6FPGA and four high performance multi-core DSP chips TMS320C6678, data processing performance is very outstanding. TMS320C6678 integrates SRIO,PCIe, Hyperlink and other high-speed serial interfaces, which can complete high-speed data transmission. Firstly, the system design of the power supply module, clock module and interface module is completed, and then the core circuit on the card is explained and explained. In the final debugging part, this paper mainly introduces the SPI program loading of TMS320C6678 and the FPGA Gigabit Ethernet debugging. The whole card architecture design takes into account the algorithm mapping, which is convenient for radar signal processing, and also takes into account the interconnection between boards.
【學(xué)位授予單位】:西安電子科技大學(xué)
【學(xué)位級(jí)別】:碩士
【學(xué)位授予年份】:2014
【分類號(hào)】:TN957.51
本文編號(hào):2277889
[Abstract]:With the continuous development of radar technology and digital signal processing technology, the performance of radar signal processing board is becoming more and more demanding, and the radar signal processing board can not meet the current demand. In this paper, the design of high performance radar digital signal processing board is discussed. This paper introduces a radar signal processing board based on multi-core DSP and FPGA. The board consists of Xilinx V6FPGA and four high performance multi-core DSP chips TMS320C6678, data processing performance is very outstanding. TMS320C6678 integrates SRIO,PCIe, Hyperlink and other high-speed serial interfaces, which can complete high-speed data transmission. Firstly, the system design of the power supply module, clock module and interface module is completed, and then the core circuit on the card is explained and explained. In the final debugging part, this paper mainly introduces the SPI program loading of TMS320C6678 and the FPGA Gigabit Ethernet debugging. The whole card architecture design takes into account the algorithm mapping, which is convenient for radar signal processing, and also takes into account the interconnection between boards.
【學(xué)位授予單位】:西安電子科技大學(xué)
【學(xué)位級(jí)別】:碩士
【學(xué)位授予年份】:2014
【分類號(hào)】:TN957.51
【參考文獻(xiàn)】
相關(guān)期刊論文 前2條
1 包利民;潘奇;;VPX總線技術(shù)及其實(shí)現(xiàn)[J];電子機(jī)械工程;2012年02期
2 柳懿;;淺談DSP與FPGA的對(duì)比和結(jié)合[J];中國(guó)水運(yùn)(下半月);2008年12期
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