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寬帶數(shù)字陣列雷達(dá)試驗(yàn)系統(tǒng)設(shè)計(jì)與仿真

發(fā)布時(shí)間:2018-09-04 07:18
【摘要】:數(shù)字陣列雷達(dá)的出現(xiàn)標(biāo)志著相控陣?yán)走_(dá)系統(tǒng)的設(shè)計(jì)進(jìn)入數(shù)字化時(shí)代,射頻模擬信號直接數(shù)字化,在提升系統(tǒng)穩(wěn)定性的同時(shí)也對數(shù)字信號的處理能力提出了更高的要求。多通道寬帶數(shù)字陣列雷達(dá)的數(shù)據(jù)率高、運(yùn)算量大、算法設(shè)計(jì)也相對復(fù)雜。為此,本文主要研究了寬帶數(shù)字陣列雷達(dá)系統(tǒng)設(shè)計(jì)中的一些關(guān)鍵問題,包括射頻采樣技術(shù)的分析與設(shè)計(jì),寬帶恒定束寬波束形成器的凸優(yōu)化設(shè)計(jì)及寬帶通道均衡技術(shù)分析,和寬帶數(shù)字陣列雷達(dá)系統(tǒng)的通用信號處理平臺軟硬件設(shè)計(jì)。并采用MATLAB仿真及實(shí)測數(shù)據(jù)分析驗(yàn)證了相關(guān)技術(shù)實(shí)現(xiàn)的可行性與有效性。論文首先闡述了寬帶數(shù)字陣列雷達(dá)的發(fā)展意義及背景。采用模塊化的設(shè)計(jì)思想將寬帶數(shù)字陣列雷達(dá)系統(tǒng)劃分成若干獨(dú)立且完備的功能模塊,包括天線前端、數(shù)字陣列模塊、寬帶數(shù)字波束形成、常規(guī)信號檢測處理及終端顯示等,論述了寬帶數(shù)字陣列系統(tǒng)中各個(gè)功能模塊的關(guān)鍵技術(shù)。從雷達(dá)威力、收發(fā)輻射方向圖以及模糊函數(shù)理論對寬帶數(shù)字陣列雷達(dá)系統(tǒng)的參數(shù)選取及波形選擇進(jìn)行研究。深入分析了P波段寬帶射頻采樣的軟硬件設(shè)計(jì),重點(diǎn)說明了模數(shù)轉(zhuǎn)換(Analog to Digital Converter,ADC)性能的理論計(jì)算和實(shí)際測試方法。從采樣率、信噪比、有效轉(zhuǎn)換位及動態(tài)范圍四方面分析了射頻采樣對ADC性能的要求。介紹了射頻采樣硬件設(shè)計(jì),包括硬件平臺結(jié)構(gòu)、現(xiàn)場可編程門陣列(Field Programmable Gate Array,FPGA)芯片選型、高速ADC芯片選擇、及ADC前端設(shè)計(jì);贘ESD2048協(xié)議設(shè)計(jì)了射頻采樣的FPGA程序,解決了多片ADC芯片之間的同步問題;谀臣几睦走_(dá)實(shí)測數(shù)據(jù),給出了實(shí)測噪聲法及注入信號法下的信噪比分析。針對寬帶數(shù)字波束形成存在的空間色散和時(shí)間色散問題,提出基于凸優(yōu)化的恒定束寬波束形成器設(shè)計(jì)。與現(xiàn)有優(yōu)化方法不同的是,本文采用待優(yōu)化頻段內(nèi)的某一頻點(diǎn)作為參考頻點(diǎn),引入調(diào)和因子,構(gòu)造了以全方位最小均方誤差和參考頻點(diǎn)上波束輻射方向圖的Minmax旁瓣電平準(zhǔn)則的凸組合為目標(biāo)函數(shù)的恒定束寬波束形成器最優(yōu)化設(shè)計(jì)問題,并可通過線性約束,實(shí)現(xiàn)指向不變、干擾置零及最大平坦波束形成器等設(shè)計(jì)。仿真分析驗(yàn)證了本文設(shè)計(jì)的有效性。采用線性調(diào)頻信號分析了寬帶通道失配對信號脈壓的影響,并分析了頻域最小二乘算法的通道均衡性能。最后,論文分析了通用信號處理平臺的設(shè)計(jì)。針對現(xiàn)代雷達(dá)系統(tǒng)通用化、標(biāo)準(zhǔn)化、模塊化和數(shù)字化的要求,提出對通用信號處理平臺的設(shè)計(jì)要求。研究了目前主流的標(biāo)準(zhǔn)傳輸協(xié)議,包括cPCI標(biāo)準(zhǔn)、VPX標(biāo)準(zhǔn)、PCIe、Rapid IO、RocketIO GTX傳輸、光纖、及以太網(wǎng)等;谝陨蠘(biāo)準(zhǔn)協(xié)議,給出了針對寬帶數(shù)字陣列雷達(dá)系統(tǒng)的通用硬件平臺設(shè)計(jì)思路和規(guī)范,以及數(shù)據(jù)傳輸拓?fù)浣Y(jié)構(gòu)等。結(jié)合某具體的寬帶數(shù)字陣列雷達(dá)系統(tǒng),分析了系統(tǒng)傳輸帶寬要求。從工程設(shè)計(jì)角度出發(fā),對一些常規(guī)檢測算法的運(yùn)算量進(jìn)行了分析。
[Abstract]:The emergence of digital array radar indicates that the design of phased array radar system has entered the digital era, the RF analog signal is digitized directly, which not only improves the stability of the system, but also puts forward higher requirements for the processing ability of digital signal. Multi-channel wideband digital array radar has high data rate, large computation and complex algorithm design. Therefore, this paper mainly studies some key problems in the design of wideband digital array radar system, including the analysis and design of RF sampling technology, the convex optimization design of broadband constant beamwidth beamformer and the analysis of wideband channel equalization technology. And the hardware and software design of general signal processing platform for wideband digital array radar system. The feasibility and effectiveness of the related technology are verified by MATLAB simulation and the analysis of measured data. Firstly, the development significance and background of wideband digital array radar are described. The wideband digital array radar system is divided into several independent and complete functional modules, including antenna front end, digital array module, wideband digital beamforming, conventional signal detection and processing, terminal display, etc. The key technology of each function module in wideband digital array system is discussed. The parameter selection and waveform selection of wideband digital array radar system are studied based on radar power, radiation pattern and ambiguity function theory. The hardware and software design of P-band broadband RF sampling is analyzed in depth, and the theoretical calculation and practical testing method of analog-to-digital conversion (Analog to Digital Converter,ADC) performance are emphasized. The requirements of RF sampling for ADC performance are analyzed in terms of sampling rate, signal-to-noise ratio (SNR), effective conversion bit and dynamic range. This paper introduces the hardware design of RF sampling, including the structure of hardware platform, the selection of field programmable gate array (Field Programmable Gate Array,FPGA) chip, the selection of high speed ADC chip, and the design of ADC front-end. The FPGA program of RF sampling is designed based on JESD2048 protocol, which solves the synchronization problem between multiple ADC chips. Based on the measured data of a technical modified radar, the signal-to-noise ratio (SNR) analysis of the measured noise method and the injection signal method is given. Aiming at the spatial and temporal dispersion problems in wideband digital beamforming, a new design of constant-beamwidth beamforming based on convex optimization is proposed. Different from the existing optimization methods, a certain frequency point in the frequency band to be optimized is used as the reference frequency point in this paper, and the harmonic factor is introduced. The optimization design problem of constant beamwidth beamforming based on the convex combination of the Minmax sidelobe level criterion of the beam radiation pattern on the omnidirectional minimum mean square error and the reference frequency is constructed, and the direction invariant can be realized by linear constraints. Interference zero setting and maximum flat beamforming design. The effectiveness of the design is verified by simulation analysis. The linear frequency modulation (LFM) signal is used to analyze the influence of Wideband channel mismatch on pulse compression, and the channel equalization performance of frequency domain least square algorithm is analyzed. Finally, the design of general signal processing platform is analyzed. In order to meet the requirements of generalization, standardization, modularization and digitization of modern radar system, the design requirements of general signal processing platform are put forward. The current mainstream standard transmission protocols, including cPCI standard VPX standard, PCI Rapid IO,RocketIO GTX transmission, fiber optic, Ethernet and so on, are studied. Based on the above standard protocol, the design idea and specification of the general hardware platform for wideband digital array radar system and the data transmission topology are given. Combined with a specific wideband digital array radar system, the transmission bandwidth requirement of the system is analyzed. From the point of view of engineering design, the computation of some conventional detection algorithms is analyzed.
【學(xué)位授予單位】:西安電子科技大學(xué)
【學(xué)位級別】:碩士
【學(xué)位授予年份】:2015
【分類號】:TN955

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