HSUPA中MAC-es協(xié)議的FPGA硬件設計
發(fā)布時間:2018-08-27 09:06
【摘要】:HSUPA(高速上行分組接入)技術是WCDMA系統(tǒng)中上行鏈路的演進技術,,該技術通過采用更容易實現(xiàn)的E-DCH復合編解碼傳輸、可選的更短的時間間隔(TTI)、HARQ重傳機制等關鍵技術,可大幅度提高WCDMA系統(tǒng)的上行數(shù)據(jù)傳輸速率。 本論文首先介紹WCDMAHSUPA的技術特點和發(fā)展狀況,闡述了HSUPA的專有結構和特性,對HSUPA關鍵技術如Node B控制的調(diào)度、HARQ、更短的TTI進行了描述。 隨后,為實現(xiàn)更大的上行數(shù)據(jù)傳輸吞吐率,著重分析了HSUPA技術中MAC-es協(xié)議層在FPGA上的實現(xiàn)過程,以Verilog語言為基礎對系統(tǒng)進行了設計及實現(xiàn),包括MAC-es協(xié)議層系統(tǒng)的架構、基于FPGA的系統(tǒng)各子層的實現(xiàn)方案,其中重點介紹了HSUPA數(shù)據(jù)包重排序問題的處理方法和MAC-es層數(shù)據(jù)包PDU的解析與分流。 最后編寫了測試用例,搭建了系統(tǒng)仿真測試平臺,使用ModelSim軟件對設計方案進行了單元功能及系統(tǒng)級功能仿真與測試。仿真結果表明,本論文提出的方案能夠實現(xiàn)設計目標,是切實可行的。
[Abstract]:HSUPA (High Speed uplink packet access) technology is the evolution technology of uplink in WCDMA system. This technology adopts the more easily realized E-DCH composite codec transmission, the optional shorter time interval (TTI) / HARQ retransmission mechanism and so on. The uplink data transmission rate of WCDMA system can be greatly improved. This paper first introduces the technical characteristics and development of WCDMAHSUPA, expounds the proprietary structure and characteristics of HSUPA, and describes the key technologies of HSUPA, such as Node B control scheduling and shorter TTI. Then, in order to realize more uplink data transmission throughput, the implementation process of MAC-es protocol layer on FPGA in HSUPA technology is analyzed emphatically. The system is designed and implemented based on Verilog language, including the architecture of MAC-es protocol layer system. The implementation scheme of each sub-layer of the system based on FPGA is introduced, in which the processing method of the HSUPA packet reordering problem and the parsing and shunting of the MAC-es layer packet PDU are introduced. Finally, the test cases are written, the system simulation and test platform is built, and the unit function and system-level function simulation and test are carried out with ModelSim software. The simulation results show that the proposed scheme can achieve the design goal and is feasible.
【學位授予單位】:華中科技大學
【學位級別】:碩士
【學位授予年份】:2014
【分類號】:TN929.5
本文編號:2206777
[Abstract]:HSUPA (High Speed uplink packet access) technology is the evolution technology of uplink in WCDMA system. This technology adopts the more easily realized E-DCH composite codec transmission, the optional shorter time interval (TTI) / HARQ retransmission mechanism and so on. The uplink data transmission rate of WCDMA system can be greatly improved. This paper first introduces the technical characteristics and development of WCDMAHSUPA, expounds the proprietary structure and characteristics of HSUPA, and describes the key technologies of HSUPA, such as Node B control scheduling and shorter TTI. Then, in order to realize more uplink data transmission throughput, the implementation process of MAC-es protocol layer on FPGA in HSUPA technology is analyzed emphatically. The system is designed and implemented based on Verilog language, including the architecture of MAC-es protocol layer system. The implementation scheme of each sub-layer of the system based on FPGA is introduced, in which the processing method of the HSUPA packet reordering problem and the parsing and shunting of the MAC-es layer packet PDU are introduced. Finally, the test cases are written, the system simulation and test platform is built, and the unit function and system-level function simulation and test are carried out with ModelSim software. The simulation results show that the proposed scheme can achieve the design goal and is feasible.
【學位授予單位】:華中科技大學
【學位級別】:碩士
【學位授予年份】:2014
【分類號】:TN929.5
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相關碩士學位論文 前1條
1 朱元林;HSUPA中MAC-es協(xié)議的FPGA硬件設計[D];華中科技大學;2014年
本文編號:2206777
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