【摘要】：隨著通信技術(shù)的高速發(fā)展,通信設(shè)備在接口設(shè)計(jì)上,已越來(lái)越多的選擇可承載大數(shù)據(jù)流量業(yè)務(wù)的高速接口進(jìn)行設(shè)計(jì),如GMII、SGMII、XAUI、RapidIO等。針對(duì)此類(lèi)應(yīng)用,除了滿足硬件設(shè)計(jì)需求,還需在設(shè)計(jì)中引入標(biāo)準(zhǔn)的通信傳輸協(xié)議,采用通用模塊化設(shè)計(jì),使軟硬件模塊具有較強(qiáng)的通用性和可移植性。本文項(xiàng)目背景如下:開(kāi)發(fā)一款基于ATCA(Advanced Telecom Computing Architecture,即先進(jìn)的電信計(jì)算平臺(tái))架構(gòu)的測(cè)試儀器專(zhuān)用通信適配板,通信適配板與ATCA機(jī)箱背板通過(guò)千兆網(wǎng)接口,與被測(cè)通信設(shè)備通過(guò)專(zhuān)用接口板接口。本論文針對(duì)上述需求,以基于嵌入式系統(tǒng)的千兆網(wǎng)UDP/IP協(xié)議棧實(shí)現(xiàn)技術(shù)為主要的研究對(duì)象,在深入分析標(biāo)準(zhǔn)UDP/IP協(xié)議棧原理的基礎(chǔ)上,對(duì)用FPGA+DSP作為硬件平臺(tái)實(shí)現(xiàn)千兆網(wǎng)UDP/IP協(xié)議棧進(jìn)行了詳盡的討論和研究,主要內(nèi)容為:1.研究標(biāo)準(zhǔn)UDP/IP協(xié)議棧,分析標(biāo)準(zhǔn)UDP/IP協(xié)議棧的分層協(xié)議功能,并針對(duì)實(shí)際應(yīng)用和硬件自身特點(diǎn)設(shè)計(jì)出相應(yīng)的通信協(xié)議棧。2.研究嵌入式技術(shù)在通信領(lǐng)域的應(yīng)用,對(duì)嵌入式技術(shù)的特點(diǎn),技術(shù)發(fā)展趨勢(shì)以及高性能的FPGA、DSP在通信領(lǐng)域的發(fā)展進(jìn)行了詳細(xì)的討論,并結(jié)合實(shí)際需求提出了嵌入式以太網(wǎng)的總體解決方案。3.設(shè)計(jì)并實(shí)現(xiàn)以FPGA為核心,基于FPGA+DSP架構(gòu)為硬件平臺(tái)的UDP/IP通信協(xié)議棧,在設(shè)計(jì)上采用FPGA作為通信的主要通道,DSP協(xié)助其進(jìn)行部分協(xié)議的分析和處理,通過(guò)對(duì)功能區(qū)域進(jìn)行明確劃分,采用模塊化的設(shè)計(jì)思想進(jìn)行實(shí)現(xiàn)。4.完成設(shè)計(jì)后對(duì)設(shè)計(jì)結(jié)果進(jìn)行仿真驗(yàn)證和硬件功能測(cè)試,并對(duì)驗(yàn)證結(jié)果進(jìn)行分析,分析結(jié)果表明,本方案在鏈路層設(shè)計(jì)上符合IEEE802.3-2008規(guī)范,提供了1000Mb的帶寬,同時(shí)完全兼容10M/100M以太網(wǎng),提供了全雙工的數(shù)據(jù)通道,實(shí)現(xiàn)了標(biāo)準(zhǔn)UDP/IP協(xié)議與通信設(shè)備專(zhuān)用協(xié)議之間的轉(zhuǎn)換,且研究成果已在其它項(xiàng)目中進(jìn)行推廣使用。
[Abstract]:With the rapid development of communication technology, more and more high speed interfaces, such as GMII / SGMIIXAUI / RapidIO, which can carry big data traffic service, have been chosen in the interface design of communication equipment. For this kind of application, in addition to meeting the requirement of hardware design, it is also necessary to introduce standard communication transmission protocol in the design, and adopt general modular design, which makes the hardware and software modules have strong generality and portability. The background of this paper is as follows: develop a special communication adaptor board based on ATCA (Advanced Telecom Computing Architecture, (advanced telecommunication computing platform) architecture, communication adapter board and ATCA crate backplane interface through gigabit network. Interface with the tested communication equipment through a special interface board. In order to meet the above requirements, this paper takes the implementation technology of gigabit network UDP/IP protocol stack based on embedded system as the main research object, on the basis of deeply analyzing the principle of standard UDP/IP protocol stack. The implementation of gigabit network UDP/IP protocol stack using FPGA DSP as hardware platform is discussed and studied in detail. The main content is: 1: 1. This paper studies the standard UDP/IP protocol stack, analyzes the hierarchical protocol function of the standard UDP/IP protocol stack, and designs the corresponding communication protocol stack .2. according to the actual application and the characteristics of the hardware itself. The application of embedded technology in the field of communication is studied. The characteristics of embedded technology, the trend of technology development and the development of high performance FPGA DSP in communication field are discussed in detail. The overall solution of embedded Ethernet. 3. This paper designs and implements a UDP/IP communication protocol stack based on FPGA and FPGA DSP architecture as hardware platform. In the design, FPGA is used as the main channel of communication to help it analyze and process some protocols, and the functional areas are clearly divided. Using modular design ideas to achieve. 4. After the design is finished, the design results are verified by simulation and hardware function test. The analysis results show that the design of the link layer conforms to the IEEE802.3-2008 specification, provides the bandwidth of 1000Mb, and is fully compatible with 10M/100M Ethernet at the same time. The full-duplex data channel is provided and the conversion between the standard UDP/IP protocol and the special protocol for communication equipment is realized. The research results have been popularized and used in other projects.
【學(xué)位授予單位】：電子科技大學(xué)
【學(xué)位級(jí)別】：碩士
【學(xué)位授予年份】：2014
【分類(lèi)號(hào)】：TN915.04

【參考文獻(xiàn)】

相關(guān)期刊論文 前2條

1 王力生;梅巖;曹南洋;;輕量級(jí)嵌入式TCP/IP協(xié)議棧的設(shè)計(jì)[J];計(jì)算機(jī)工程;2007年02期

2 李向濤,仵國(guó)鋒;FPGA同步設(shè)計(jì)技術(shù)[J];無(wú)線通信技術(shù);2003年03期

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本文編號(hào)：2191820