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高功率音頻放大對管的研究與仿真優(yōu)化設計

發(fā)布時間:2018-07-25 08:12
【摘要】:論文的研究目的是通過對某高功率音頻放大對管的研究與仿真優(yōu)化設計,提出一種使器件的二次擊穿電流得到提升的新穎結(jié)構(gòu)。通過改善發(fā)射極電流集邊效應引發(fā)的二次擊穿問題,從而能夠提高本產(chǎn)品安全工作區(qū)的范圍;诒緦嶒炇遗c國內(nèi)某知名半導體公司合作研發(fā)項目,并通過產(chǎn)品工藝及版圖結(jié)構(gòu)的改進,達到產(chǎn)品參數(shù)指標的要求。文中對一款具有新穎結(jié)構(gòu)的高功率音頻放大對管進行仿真優(yōu)化設計,首先對高功率音頻放大對管的各個物理參數(shù)的設計,設計了各個區(qū)的摻雜濃度,擴散系數(shù),遷移率,擴散長度和壽命等,并且確定了器件的縱向參數(shù)等。然后對器件縱向結(jié)構(gòu)設計,并且通過仿真軟件對工藝流程和元胞結(jié)構(gòu)設計完成了仿真模擬,通過器件和工藝的聯(lián)合仿真,然后對元胞結(jié)構(gòu)和工藝參數(shù)進行仿真優(yōu)化設計,最終確定了設計器件制作的主要工藝參數(shù)和版圖設計,并討論關鍵工藝步驟的實現(xiàn)方式。對上述設計的高功率音頻放大對管進行流片測試,最終測試參數(shù)如下:PNP管:BVCBO=-307.1V,ICBO=-13.24nA,BVCEO=-287.4V,ICEO=-25.3nA,BVEBO=-9.13V,IEBO=-18.84nA,VCE(sat)=-0.14V,VBE(sat)=-0.93V,ICM=12.5A,HFE=86,ISB=3A;NPN管:BVCBO=348.2V,ICBO=29.09nA,BVCEO=285.6V,ICEO=520.5nA,BVEBO=8.26V,IEBO=29.87nA,VCE(sat)=0.12V,VBE(sat)=0.92V,ICM=12A,HFE=115,ISB=3.5A。通過流片后的各項測試結(jié)果顯示,所設計的高功率音頻放大對管器件靜態(tài)參數(shù)滿足設計要求,并具有較高的二次擊穿電流值。
[Abstract]:The purpose of this paper is to propose a novel structure to enhance the secondary breakdown current of the device by studying and optimizing the design of a high power audio amplifier pair. By improving the secondary breakdown caused by the edge effect of emitter current, the range of the safe working area of this product can be increased. Based on the R & D project of our laboratory and a famous semiconductor company in China, and through the improvement of product process and layout structure, we can meet the requirements of product parameters. In this paper, a novel high power audio amplifier is simulated and optimized. Firstly, the doping concentration, diffusion coefficient, mobility of each region are designed for each physical parameter of high power audio amplifier. The diffusion length and lifetime are also determined, and the longitudinal parameters of the device are determined. Then, the longitudinal structure of the device is designed, and the process flow and cell structure are simulated by simulation software, and then the cell structure and process parameters are simulated and optimized by the joint simulation of the device and the process. Finally, the main process parameters and layout design are determined, and the key process steps are discussed. 瀵逛笂榪拌璁$殑楂樺姛鐜囬煶棰戞斁澶у綆¤繘琛屾祦鐗囨祴璇,

本文編號:2143186

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