本文選題：北斗衛(wèi)星導航系統(tǒng) + 基帶處理��； 參考：《北京交通大學》2014年碩士論文

【摘要】：北斗衛(wèi)星導航系統(tǒng)的高速發(fā)展帶動了衛(wèi)星導航產(chǎn)業(yè)的快速發(fā)展。北斗接收機是北斗衛(wèi)星導航系統(tǒng)的用戶終端設(shè)備,低成本、高性能的接收機是其廣泛應(yīng)用的基礎(chǔ)。北斗接收機的設(shè)計可以分為三個部分：射頻前端、基帶處理和定位解算。在這三個部分中,基帶處理的性能很大程度上決定了接收機的性能,對基帶處理的研究是開發(fā)高性能接收機的重要環(huán)節(jié)�；鶐幚碇饕瓿尚l(wèi)星信號的捕獲和跟蹤,目的在于使接收機內(nèi)部產(chǎn)生的載波信號和偽碼信號與射頻前端輸出的中頻信號的載波頻率和偽碼相位保持一致。當跟蹤進入穩(wěn)定狀態(tài)后,可以解調(diào)出衛(wèi)星的星歷和歷書數(shù)據(jù),提取偽距觀測量和多普勒頻移值,用于定位解算部分進行PVT(位置、速度和時間)的計算。 本文對基于FPGA的北斗接收機實現(xiàn)進行了研究,重點研究了基帶處理的捕獲和跟蹤。北斗衛(wèi)星信號的捕獲是衛(wèi)星編號、載波頻率和偽碼相位的三維搜索。常用的信號捕獲方法有基于時域的串行滑動相關(guān)捕獲法、并行頻率搜索捕獲法、并行碼相位搜索捕獲法。論文對三種不同捕獲算法的計算復雜度及捕獲時間進行了對比分析,并選擇基于時域的串行滑動相關(guān)捕獲法的方法設(shè)計了BD2的衛(wèi)星信號捕獲。 衛(wèi)星信號的跟蹤分為載波跟蹤和偽碼跟蹤�，F(xiàn)有跟蹤方法實現(xiàn)中,載波跟蹤通常采用COSTAS環(huán)結(jié)構(gòu),偽碼跟蹤多采用延遲鎖定環(huán)結(jié)構(gòu)。本文也采用了相同的結(jié)構(gòu)對BD2的載波跟蹤和碼跟蹤部分進行了設(shè)計。 基帶處理部分的設(shè)計,在基于Xilinx的FPGA+ARM9的硬件平臺上進行了初步驗證。利用VHDL語言設(shè)計了基帶相關(guān)器的核心模塊,如載波NCO模塊,碼發(fā)生器模塊和碼NCO模塊等,并用Modelsim對相關(guān)的模塊設(shè)計進行了仿真。仿真結(jié)果表明了設(shè)計的正確性。
[Abstract]:The rapid development of Beidou satellite navigation system drives the rapid development of satellite navigation industry. Beidou receiver is the terminal equipment of Beidou satellite navigation system. The low cost and high performance receiver is the basis of its wide application. The design of Beidou receiver can be divided into three parts: RF front end, baseband processing and positioning solution. In these three parts, the performance of baseband processing determines the performance of the receiver to a large extent, and the research of baseband processing is an important part in the development of high performance receiver. The baseband processing mainly accomplishes the acquisition and tracking of satellite signals, the purpose of which is to keep the carrier frequency and pseudo-code phase of the carrier signals and pseudo-code signals generated in the receiver consistent with those of the RF front-end output intermediate frequency signals. After tracking into a stable state, the satellite ephemeris and ephemeris data can be extracted, and pseudo-range observations and Doppler frequency shifts can be extracted, which can be used to calculate the PVT (position, velocity and time) in the location solution. In this paper, the implementation of the Beidou receiver based on FPGA is studied, especially the acquisition and tracking of baseband processing. The acquisition of Beidou satellite signal is a three-dimensional search of satellite number, carrier frequency and pseudo-code phase. The commonly used signal acquisition methods include serial sliding correlation acquisition based on time domain, parallel frequency search acquisition and parallel code phase search acquisition. In this paper, the computational complexity and acquisition time of three different acquisition algorithms are compared and analyzed, and the method of serial sliding correlation acquisition based on time domain is selected to design BD2 satellite signal acquisition. Satellite signal tracking is divided into carrier tracking and pseudo code tracking. In the current implementation of tracking methods, Costas loop is usually used for carrier tracking, and delay locking loop is used for pseudo code tracking. The carrier tracking and code tracking part of BD2 is designed with the same structure. The design of baseband processing is preliminarily verified on the hardware platform of FPGA ARM9 based on Xilinx. The core modules of baseband correlator, such as carrier NCO module, code generator module and code NCO module, are designed by using VHDL language, and the related modules are simulated with Modelsim. The simulation results show that the design is correct.
【學位授予單位】：北京交通大學
【學位級別】：碩士
【學位授予年份】：2014
【分類號】：TN96.1

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本文編號：2084058