發(fā)布時間：2018-03-02 16:39

  本文選題：防撞雷達　切入點：FPGA　出處：《哈爾濱工業(yè)大學》2014年碩士論文　論文類型：學位論文

【摘要】：目前，我國鐵路行車事故時有發(fā)生，客運列車傷亡事故依然存在。在汽車等領域已經(jīng)廣泛的使用的防撞雷達系統(tǒng)，還未在機車防撞中應用。機車防撞雷達作為鐵路安全運行的輔助設備，具有很高的實用價值。本文研究了防撞雷達中的基本信號處理，，包括數(shù)字下變頻技術和高速數(shù)據(jù)傳輸技術，并對信號檢測技術進行了理論分析和DSP編程實現(xiàn)。通過對系統(tǒng)實際測試數(shù)據(jù)的分析，驗證了機車防撞雷達對目標測速、測距和測角的能力。 基本信號處理主要包括，數(shù)據(jù)采集、混頻、FIR濾波和抽取。本文詳細介紹了基本信號處理在FPGA的實現(xiàn)過程，設計中充分考慮了資源及性能的平衡，完成了四路信號的數(shù)字下變頻任務。系統(tǒng)參數(shù)的特殊，使得混頻模塊可以得到簡化。FIR濾波采用Xilinx公司的IP core實現(xiàn)，通過多路復用節(jié)約了資源。利用PLL+DCM的方式，為各模塊工作提供了穩(wěn)定而可靠的時鐘。設計過程遵循自下而上、模塊化的思想，使用Verilog語言在ISE中對每個模塊進行實例化。通過Modelsim仿真，并結合Matlab對數(shù)據(jù)進行處理，各模塊功能的正確性得到了驗證。 本文介紹了在DSP上利用SYS/BIOS操作系統(tǒng)，實現(xiàn)對各功能模塊合理調度以及資源配置，完成回波數(shù)據(jù)通過uPP接口進行傳輸，然后經(jīng)過靜止目標檢測，探測出靜止障礙物目標，最終利用NDK實現(xiàn)數(shù)據(jù)由以太網(wǎng)向PC機傳輸。 分兩步對機車防撞雷達系統(tǒng)進行了測試。通過基本信號處理測試和系統(tǒng)聯(lián)調，對系統(tǒng)性能得到了一個初步的了解。接著，在機車實際運行環(huán)境進行了外場數(shù)據(jù)錄取，針對各種軌道障礙物進行了探測實驗。最后，針對運動目標和靜止目標，提出了相應的檢測方法，完成了對實驗數(shù)據(jù)的分析，并驗證了DSP在靜止目標檢測算法實現(xiàn)中的能力。
[Abstract]:At present, China's railway traffic accidents occur from time to time, and passenger train casualties still exist. Collision prevention radar systems have been widely used in areas such as automobiles. Locomotive anti-collision radar has high practical value as auxiliary equipment for railway safety operation. The basic signal processing in anti-collision radar is studied in this paper. It includes digital down-conversion technology and high-speed data transmission technology, and carries on the theoretical analysis and DSP programming realization to the signal detection technology. Through the analysis of the actual test data of the system, it verifies that the locomotive anti-collision radar measures the velocity of the target. The ability to measure distance and angle. The basic signal processing includes data acquisition, frequency mixing Fir filtering and decimation. This paper introduces the realization of basic signal processing in FPGA in detail, and fully considers the balance of resources and performance in the design. The task of digital downconversion of four signals is completed. The special parameters of the system make the mixing module can be simplified. Fir filter is realized by IP core of Xilinx Company, and the resource is saved by multiplexing. PLL DCM is used. The design process follows the idea of bottom-up and modularization, and uses Verilog language to instantiate each module in ISE. Through Modelsim simulation, and combining with Matlab to deal with the data, the design process follows the idea of bottom-up, modularization and instantiation of each module in ISE. The correctness of each module function is verified. This paper introduces how to use the SYS/BIOS operating system on DSP to realize the reasonable scheduling and resource allocation of each functional module. The echo data is transmitted through the uPP interface, and then the static target is detected through the detection of the static target. Finally, NDK is used to realize data transmission from Ethernet to PC. The locomotive anti-collision radar system is tested in two steps. Through the basic signal processing test and system connection adjustment, a preliminary understanding of the performance of the system is obtained. Then, the external field data are recorded in the actual running environment of the locomotive. Finally, a corresponding detection method for moving and stationary targets is proposed, and the analysis of experimental data is completed, and the ability of DSP in the realization of static target detection algorithm is verified.
【學位授予單位】：哈爾濱工業(yè)大學
【學位級別】：碩士
【學位授予年份】：2014
【分類號】：TN957.51

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