發(fā)布時(shí)間：2018-01-26 03:22

  本文關(guān)鍵詞： 直接序列擴(kuò)頻 窄帶干擾 碼輔助技術(shù) FPGA　出處：《電子科技大學(xué)》2014年碩士論文　論文類型：學(xué)位論文

【摘要】：憑借自身的抗干擾特性,直接序列擴(kuò)頻系統(tǒng)在現(xiàn)代通信中得到了廣泛的應(yīng)用。然而由于受到可用帶寬、實(shí)現(xiàn)復(fù)雜度等條件限制,直擴(kuò)系統(tǒng)的抗干擾能力終究有限。一旦干擾信號(hào)的功率超過(guò)了直擴(kuò)系統(tǒng)的干擾門限,直擴(kuò)系統(tǒng)的性能將惡化,甚至不能正常工作。論文研究了直擴(kuò)信號(hào)的窄帶干擾抑制技術(shù),設(shè)計(jì)了三通道直擴(kuò)信號(hào)的窄帶干擾抑制方案,完成了干擾抑制軟件的FPGA實(shí)現(xiàn),并針對(duì)各項(xiàng)功能和指標(biāo),進(jìn)行了詳細(xì)的測(cè)試。全文主要工作如下:首先,設(shè)計(jì)了基于碼輔助技術(shù)的三通道直擴(kuò)信號(hào)窄帶干擾抑制方案:(1)利用仿真驗(yàn)證了碼輔助算法里分組長(zhǎng)度M和干擾抑制性能的關(guān)系,確定了滿足工程實(shí)現(xiàn)需求的分組長(zhǎng)度M=12;(2)引入了延時(shí)分路,只增加很少的資源消耗,使得改進(jìn)方案的干擾抑制性能比傳統(tǒng)碼輔助技術(shù)提高約0.6dB/Hz;(3)利用部分更新RLS算法,設(shè)計(jì)了三通道復(fù)用自相關(guān)矩陣更新模塊的架構(gòu)。與各通道獨(dú)占自相關(guān)矩陣更新模塊的架構(gòu)相比,新架構(gòu)降低資源消耗約60%,且干擾抑制性能無(wú)明顯差異。其次,給出了三通道直擴(kuò)信號(hào)窄帶干擾抑制方案在FPGA上的詳細(xì)設(shè)計(jì)。自頂向下設(shè)計(jì)了干擾抑制方案在FPGA上的實(shí)現(xiàn)細(xì)則,包括軟件總體架構(gòu),子模塊劃分,接口定義和約束,以及主要模塊的處理流程。最后,完成了三通道直擴(kuò)信號(hào)窄帶干擾抑制軟件的性能測(cè)試。結(jié)果表明,干擾抑制軟件實(shí)現(xiàn)了射頻衰減控制和輸出功率控制的功能;而且,在信號(hào)載噪比最低(56.5dB/Hz),干信比最強(qiáng)(單音34dB,窄帶27dB)的情況下,經(jīng)干擾抑制處理,達(dá)到了系統(tǒng)載噪比損失不超過(guò)2.5dB/Hz的要求,滿足了I路誤碼率不超過(guò)81.0 10-′,Q路誤碼率不超過(guò)71.0 10-′的指標(biāo)。本文設(shè)計(jì)的窄帶干擾抑制軟件,是作為獨(dú)立模塊加在直擴(kuò)信號(hào)接收機(jī)前端的,并未影響現(xiàn)有接收機(jī)結(jié)構(gòu)。在目前的直擴(kuò)系統(tǒng)中,具有較強(qiáng)的可移植性和實(shí)用性。
[Abstract]:Direct sequence spread spectrum system (DSSS) has been widely used in modern communication due to its own anti-jamming characteristics. However, due to the available bandwidth, implementation complexity and other constraints. The anti-jamming ability of DSSS system is limited after all. Once the power of interference signal exceeds the interference threshold of DSSS system, the performance of DSSS system will deteriorate. This paper studies the narrowband interference suppression technology of DSSS signal, designs the narrowband interference suppression scheme of three-channel DSSS signal, and completes the FPGA implementation of interference suppression software. And according to the various functions and indicators, a detailed test. The main work of this paper is as follows: first. The narrow-band interference suppression scheme of three-channel direct spread spectrum signal based on code-assisted technique is designed. The simulation results show the relationship between block length M and interference suppression performance in the code-aided algorithm. The packet length M12 is determined to meet the requirements of engineering implementation. 2) the delay shunt is introduced, which only increases the resource consumption, and the interference suppression performance of the improved scheme is about 0.6 dB / Hz higher than that of the traditional code assistive technique. Using partial update RLS algorithm, this paper designs the architecture of three-channel multiplexing autocorrelation matrix updating module, which is compared with the architecture of each channel exclusive autocorrelation matrix update module. The new architecture reduces the resource consumption by about 60%, and there is no significant difference in the performance of interference suppression. The detailed design of the narrowband interference suppression scheme of three-channel direct spread spectrum signal on FPGA is given. The implementation details of the interference suppression scheme on FPGA are designed from top to bottom, including the overall software architecture and sub-module partition. Interface definition and constraint, as well as the processing flow of the main modules. Finally, the performance test of the three-channel direct spread spectrum signal narrowband interference suppression software is completed. The interference suppression software realizes the functions of RF attenuation control and output power control. Moreover, under the condition of the lowest signal-to-noise ratio of 56.5 dB / HzN and the strongest signal-to-interference ratio (single tone 34 dB, narrow band 27 dB), the interference suppression is carried out. The system can meet the requirement of loss of carrier to noise ratio less than 2.5 dB / Hz and the bit error rate of I is not more than 81.0 10'. The code error rate of Q channel is less than 71.0 10'. The narrowband interference suppression software designed in this paper is used as an independent module in the front end of the DSSS signal receiver. It does not affect the existing receiver structure. It has strong portability and practicability in the current DSSS system.
【學(xué)位授予單位】：電子科技大學(xué)
【學(xué)位級(jí)別】：碩士
【學(xué)位授予年份】：2014
【分類號(hào)】：TN911.4

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本文編號(hào)：1464522