基于USB3.0與FPGA的圖像采集處理系統(tǒng)研究
本文選題:集成電路技術(shù) 切入點(diǎn):圖像采集 出處:《深圳大學(xué)》2017年碩士論文
【摘要】:圖像信息具有直觀形象、處理精度高等特點(diǎn),其應(yīng)用越來越廣泛。與此同時(shí),人們對(duì)于圖像采集的質(zhì)量和效率也有著更高的要求,這就需要圖像采集處理系統(tǒng)解決一些現(xiàn)實(shí)存在的問題以滿足這些需求。如今的圖像采集逐漸向著高分辨率、高幀率發(fā)展,由此帶來了圖像數(shù)據(jù)傳輸效率和穩(wěn)定性的問題,且隨著圖像處理復(fù)雜度的日益提升,圖像處理在實(shí)時(shí)性方面也有所欠缺。本研究主要就是針對(duì)這兩方面進(jìn)行的。高分辨率、高幀率意味著需要高帶寬。為了獲取高速的傳輸速率,本研究選擇的是基于USB3.0與FPGA的硬件架構(gòu)。通過對(duì)數(shù)據(jù)傳輸方案進(jìn)行深入分析,選擇合適的數(shù)據(jù)傳輸類型和傳輸接口,實(shí)現(xiàn)USB3.0數(shù)據(jù)吞吐量的最大化,以提升數(shù)據(jù)傳輸?shù)男?利用幀校驗(yàn)的方式實(shí)現(xiàn)圖像數(shù)據(jù)的幀同步,使得系統(tǒng)具備容錯(cuò)校正機(jī)制,并通過添加數(shù)據(jù)緩存模塊以避免數(shù)據(jù)丟失,從而提升數(shù)據(jù)傳輸?shù)姆(wěn)定性。而在處理實(shí)時(shí)性方面,利用FPGA器件并行處理的特點(diǎn),在圖像采集的過程中添加圖像預(yù)處理功能,此處主要討論了圖像卷積運(yùn)算和統(tǒng)計(jì)排序運(yùn)算的FPGA實(shí)現(xiàn),并給出Sobel算子和中值濾波這兩個(gè)相關(guān)的運(yùn)用實(shí)例,說明硬件加速的實(shí)現(xiàn),這可在實(shí)際的圖像應(yīng)用中,減輕后端圖像軟件處理的壓力,從而減少圖像處理的總時(shí)間。通過上述的方案,實(shí)驗(yàn)結(jié)果表明,該系統(tǒng)可穩(wěn)定地進(jìn)行2592×1944@14fps的圖像采集,具備圖像幀自動(dòng)糾錯(cuò)功能,數(shù)據(jù)傳輸帶寬可達(dá)320 MB/s,圖像預(yù)處理功能工作正常。
[Abstract]:Image information has the characteristics of visual image, high processing precision and so on, and its application is more and more extensive. At the same time, people have higher requirements for the quality and efficiency of image collection. This requires the image acquisition and processing system to solve some practical problems in order to meet these needs. Nowadays, image acquisition is gradually developing towards high resolution and high frame rate, which brings about the problem of the efficiency and stability of image data transmission. With the increasing complexity of image processing, image processing is also lacking in real-time. High frame rate means high bandwidth. In order to obtain the high transmission rate, the hardware architecture based on USB3.0 and FPGA is chosen in this study. Through the in-depth analysis of the data transmission scheme, the appropriate data transmission type and transmission interface are selected. In order to maximize the throughput of USB3.0 data and improve the efficiency of data transmission, the frame synchronization of image data is realized by frame check, which makes the system have fault-tolerant correction mechanism, and by adding data cache module to avoid data loss. So as to improve the stability of data transmission. In the aspect of real-time processing, using the characteristics of parallel processing of FPGA devices, the image preprocessing function is added in the process of image acquisition. This paper mainly discusses the FPGA implementation of image convolution operation and statistical sorting operation, and gives two related examples of Sobel operator and median filter to illustrate the implementation of hardware acceleration, which can be used in actual image application. By reducing the pressure of back-end image software processing and reducing the total time of image processing, the experimental results show that the system can acquire 2592 脳 1944@14fps images stably, and has the function of automatic error correction of image frames. Data transmission bandwidth can reach 320 MB / s, image preprocessing function works well.
【學(xué)位授予單位】:深圳大學(xué)
【學(xué)位級(jí)別】:碩士
【學(xué)位授予年份】:2017
【分類號(hào)】:TP391.41
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