本文關(guān)鍵詞： 可重構(gòu)平臺(tái) FPGA 哈希函數(shù) CSA 流水線　出處：《鄭州大學(xué)》2017年碩士論文　論文類(lèi)型：學(xué)位論文

【摘要】：近些年,隨著互聯(lián)網(wǎng)的普及和廣泛應(yīng)用,不管是在各種文檔、網(wǎng)上銀行、收發(fā)e-mail,還是在其它對(duì)安全性要求極高的數(shù)字通信領(lǐng)域,加密技術(shù)已經(jīng)成為了保證數(shù)據(jù)傳輸私密性的一個(gè)重要工具。針對(duì)此類(lèi)問(wèn)題,美國(guó)國(guó)家標(biāo)準(zhǔn)技術(shù)研究所和美國(guó)安全局先后公布了SHA-1、SHA-224、SHA-256、SHA-384和SHA-512算法。另外,在高性能計(jì)算的性能不斷刷新紀(jì)錄帶給人們驚喜的同時(shí),我們不得不黯然接受兩個(gè)令人沮喪的事實(shí):計(jì)算機(jī)功耗越來(lái)越大和計(jì)算機(jī)的實(shí)際應(yīng)用效率并沒(méi)有獲得期望的提升。高端計(jì)算的研究熱點(diǎn)逐漸從高性能計(jì)算轉(zhuǎn)向到高效能計(jì)算,越來(lái)越多的學(xué)者開(kāi)始致力于可重構(gòu)計(jì)算平臺(tái)的研究。哈希函數(shù)被廣泛應(yīng)用于消息認(rèn)證、數(shù)字簽名、口令安全等領(lǐng)域。近年來(lái),針對(duì)哈希函數(shù)硬件實(shí)現(xiàn)的研究較多,但多數(shù)研究只對(duì)哈希函數(shù)中的某一種進(jìn)行了硬件設(shè)計(jì)與實(shí)現(xiàn)。然而,不同環(huán)境對(duì)哈希函數(shù)安全強(qiáng)度的要求不同,可能需要在不同算法之間進(jìn)行切換,若使用不同的硬件電路來(lái)分別實(shí)現(xiàn),既浪費(fèi)資源,又降低了工作效率。另外,低功耗、高性能,小面積是當(dāng)今加密芯片的發(fā)展趨勢(shì)。針對(duì)上述問(wèn)題,本文深入分析了SHA-1、SHA-256和SHA-512三種哈希函數(shù)的共性和不同點(diǎn),采用了可重構(gòu)計(jì)算思想,結(jié)合FPGA結(jié)構(gòu)特點(diǎn),按以下幾部分展開(kāi):1、在總結(jié)、歸納三種哈希函數(shù)可重構(gòu)模塊與單元的基礎(chǔ)上,采用可重構(gòu)體系的設(shè)計(jì)思路,給出了SHA-1、SHA-256和SHA-512三種哈希函數(shù)的消息擴(kuò)展模塊、迭代壓縮模塊等模塊的可重構(gòu)設(shè)計(jì)。2、設(shè)計(jì)了可以實(shí)現(xiàn)SHA-1、SHA-256和SHA-512三種哈希函數(shù)的硬件結(jié)構(gòu),在關(guān)鍵計(jì)算路徑對(duì)加法運(yùn)算進(jìn)行了優(yōu)化,并且配合全流水線結(jié)構(gòu),實(shí)現(xiàn)了較高的吞吐率,SHA-1、SHA-256和SHA-512三種哈希函數(shù)也可以單獨(dú)靈活地實(shí)現(xiàn)。3、隨機(jī)選取一個(gè)加密SHA-1文件,分別在可重構(gòu)組件和通用服務(wù)器上進(jìn)行口令破解實(shí)驗(yàn),記錄了各自的破解速度和功耗,計(jì)算出相應(yīng)的能效比。實(shí)驗(yàn)表明,可重構(gòu)組件的能效比要高于通用服務(wù)器的。
[Abstract]:In recent years, with the popularity and wide application of the Internet, whether in all kinds of documents, online banking, sending and receiving e-mail, or in other areas of digital communications with high security requirements, Encryption technology has become an important tool to ensure the privacy of data transmission. In order to solve this problem, the National Institute of Standards and Technology and the United States Security Agency have successively published the SHA-1, SHA-224, SHA-256, SHA-384 and SHA-512 algorithms. While the performance of high performance computing keeps breaking records, We have to accept two depressing facts: the increasing power consumption of computers and the lack of the desired improvement in the actual application efficiency of computers. The research focus of high-end computing has gradually shifted from high performance computing to high efficiency computing. More and more scholars begin to devote themselves to the research of reconfigurable computing platform. Hash function is widely used in the fields of message authentication, digital signature, password security and so on. However, most studies only design and implement one of the hash functions. However, different environments require different security strength of the hash function, so they may need to switch between different algorithms. If different hardware circuits are used to realize them separately, it will not only waste resources but also reduce working efficiency. In addition, low power consumption, high performance and small area are the development trend of encryption chips. In this paper, we deeply analyze the commonness and difference of SHA-1n SHA-256 and SHA-512 hash functions, adopt the idea of reconfigurable computation, combine with the characteristics of FPGA structure, and expand to 1: 1 according to the following several parts. On the basis of summing up three kinds of reconfigurable modules and units of hash functions, we conclude three kinds of hash function reconfigurable modules and units. Based on the idea of reconfigurable architecture, the reconfigurable design of message extension module, iterative compression module and SHA-512 hash function of SHA-1 / SHA-256 and SHA-512 are given. The hardware structure of SHA-1 / SHA-256 and SHA-512 hashing function is designed. The addition operation is optimized in the critical computing path, and with the structure of full pipeline, three kinds of hash functions, SHA-1 SHA-256 and SHA-512, can be implemented flexibly and separately, and an encrypted SHA-1 file is selected randomly. Password cracking experiments are carried out on reconfigurable components and general purpose servers respectively. The decoding speed and power consumption are recorded and the corresponding EER is calculated. The experiments show that the EER of reconfigurable components is higher than that of common servers.
【學(xué)位授予單位】：鄭州大學(xué)
【學(xué)位級(jí)別】：碩士
【學(xué)位授予年份】：2017
【分類(lèi)號(hào)】：TP309

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本文編號(hào)：1533052