抗輻射容錯計算機的設(shè)計與實現(xiàn)
發(fā)布時間：2019-06-29 07:06
【摘要】：在航空航天領(lǐng)域，計算機系統(tǒng)常常受到輻射的影響。尤其是電磁脈沖，，給計算機系統(tǒng)的可靠工作帶來了極大的威脅。由于計算機工作環(huán)境惡劣難于進行人工的維護，但又必須保證計算機能夠安全穩(wěn)定的工作，所以如何提高計算機系統(tǒng)的抗輻射能力，具有重要的現(xiàn)實意義和經(jīng)濟價值。傳統(tǒng)的抗輻射技術(shù)是在機器層采用無縫機殼屏蔽技術(shù)和在部件層使用加固芯片。但是這仍然不能完全屏蔽掉電磁脈沖，耦合進入到機箱中的電磁脈沖依然會導(dǎo)致硬件失效。如何從計算機體系結(jié)構(gòu)的層面提高計算機系統(tǒng)抗輻射能力成為計算機抗輻射研究的重要內(nèi)容。 本文首先對輻射效應(yīng)和抗輻射技術(shù)進行了研究。引入容錯理論，從計算機的設(shè)計角度提出了一種抗輻射容錯計算機的設(shè)計方案。系統(tǒng)采用一個備份源的機器級冷備份待命儲備系統(tǒng)方式實現(xiàn)�；诶鋫浞荼葻醾浞輰椛溆绕涫请姶琶}沖有著更好的抗干擾能力，在備份原狀態(tài)的選擇、供電電路的設(shè)計及檢測器的設(shè)置上都做出相應(yīng)的考慮。 然后從CPLD邏輯設(shè)計及硬件電路兩方面對原理樣機進行詳細設(shè)計與實現(xiàn)。原理樣機由2個主機板和一個公共板組成，每個主機板上有一個容錯管理模塊。容錯管理模塊針對輻射引發(fā)故障頻繁的處理器和I/O接口電路進行故障檢測，并采用瞬時故障本機復(fù)位及永久故障系統(tǒng)切換的故障處理機制。 為驗證系統(tǒng)故障檢測和故障處理的容錯機制，本文開發(fā)了一個植入式故障注入系統(tǒng)。注入系統(tǒng)可以向用以進行處理器和I/O接口故障檢測的數(shù)據(jù)線注入永久和瞬時故障，模擬計算機在現(xiàn)實運行環(huán)境下發(fā)生的各種常見故障。最后通過故障注入系統(tǒng)，對原理樣機的容錯機制進行了故障注入實驗，驗證了系統(tǒng)故障檢測機制和故障處理能力。
[Abstract]:In the field of aerospace, computer systems are often affected by radiation. In particular, electromagnetic pulse brings great threat to the reliable work of computer system. Because the computer working environment is difficult to maintain manually, but it is necessary to ensure that the computer can work safely and stably, so how to improve the radiation resistance of the computer system is of great practical significance and economic value. The traditional anti-radiation technology is to use seamless housing shielding technology in the machine layer and reinforcement chip in the component layer. However, the electromagnetic pulse can not be completely shielded, and the electromagnetic pulse coupled into the chassis will still lead to hardware failure. How to improve the radiation resistance of computer system from the level of computer architecture has become an important part of computer radiation resistance research. In this paper, the radiation effect and anti-radiation technology are studied at first. Based on the theory of fault tolerance, a design scheme of anti-radiation fault-tolerant computer is proposed from the point of view of computer design. The system is realized by a machine level cold backup standby reserve system with backup source. Based on the fact that cold backup has better anti-interference ability to radiation, especially electromagnetic pulse, the selection of original state of backup, the design of power supply circuit and the setting of detector are considered accordingly. Then the prototype is designed and implemented in detail from two aspects of CPLD logic design and hardware circuit. The prototype consists of two motherboards and one common board, each of which has a fault-tolerant management module. The fault-tolerant management module detects the fault of the processor and I / O interface circuit with frequent radiation-induced faults, and adopts the fault processing mechanism of instantaneous fault local reset and permanent fault system switching. In order to verify the fault-tolerant mechanism of fault detection and fault processing, an implantable fault injection system is developed in this paper. The injection system can inject permanent and instantaneous faults into the data lines used for processor and I / O interface fault detection, and simulate all kinds of common faults of the computer in the real running environment. Finally, the fault injection experiment of the fault tolerant mechanism of the prototype is carried out through the fault injection system, and the fault detection mechanism and fault processing ability of the system are verified.
【學(xué)位授予單位】：哈爾濱工業(yè)大學(xué)
【學(xué)位級別】：碩士
【學(xué)位授予年份】：2012
【分類號】：TP302.8
本文編號：2507642
[Abstract]:In the field of aerospace, computer systems are often affected by radiation. In particular, electromagnetic pulse brings great threat to the reliable work of computer system. Because the computer working environment is difficult to maintain manually, but it is necessary to ensure that the computer can work safely and stably, so how to improve the radiation resistance of the computer system is of great practical significance and economic value. The traditional anti-radiation technology is to use seamless housing shielding technology in the machine layer and reinforcement chip in the component layer. However, the electromagnetic pulse can not be completely shielded, and the electromagnetic pulse coupled into the chassis will still lead to hardware failure. How to improve the radiation resistance of computer system from the level of computer architecture has become an important part of computer radiation resistance research. In this paper, the radiation effect and anti-radiation technology are studied at first. Based on the theory of fault tolerance, a design scheme of anti-radiation fault-tolerant computer is proposed from the point of view of computer design. The system is realized by a machine level cold backup standby reserve system with backup source. Based on the fact that cold backup has better anti-interference ability to radiation, especially electromagnetic pulse, the selection of original state of backup, the design of power supply circuit and the setting of detector are considered accordingly. Then the prototype is designed and implemented in detail from two aspects of CPLD logic design and hardware circuit. The prototype consists of two motherboards and one common board, each of which has a fault-tolerant management module. The fault-tolerant management module detects the fault of the processor and I / O interface circuit with frequent radiation-induced faults, and adopts the fault processing mechanism of instantaneous fault local reset and permanent fault system switching. In order to verify the fault-tolerant mechanism of fault detection and fault processing, an implantable fault injection system is developed in this paper. The injection system can inject permanent and instantaneous faults into the data lines used for processor and I / O interface fault detection, and simulate all kinds of common faults of the computer in the real running environment. Finally, the fault injection experiment of the fault tolerant mechanism of the prototype is carried out through the fault injection system, and the fault detection mechanism and fault processing ability of the system are verified.
【學(xué)位授予單位】：哈爾濱工業(yè)大學(xué)
【學(xué)位級別】：碩士
【學(xué)位授予年份】：2012
【分類號】：TP302.8
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