【摘要】：如今，嵌入式技術(shù)的發(fā)展十分迅速，使其數(shù)量與日俱增，應(yīng)用也逐步滲入到人們生活的各個角落。與此同時，Java以其突出的優(yōu)點在嵌入式中扮演的角色也越來越重。Java處理器免除了把Java字節(jié)碼轉(zhuǎn)換為機器代碼的工作同時還可以針對Java虛擬機的各項特點提供特殊的硬件支持，因此具有能夠直接硬件執(zhí)行Java字節(jié)碼、高效率執(zhí)行、占用較少內(nèi)存、使用功耗低等特點，有更適合用于資源受限的嵌入式設(shè)備的特點，并且適用于異構(gòu)方式，以提升系統(tǒng)的性能。 JOP處理器每個時鐘周期僅取一條Java字節(jié)碼，并且考慮到WCET(worstcase execution time)分析的需要，對指令Cache進(jìn)行了針對性的特別設(shè)計，使其成為目前為止消耗資源最少的一款Java處理器。總體而言，對于資源緊缺的嵌入式環(huán)境來說選取JOP來進(jìn)行應(yīng)用較為適合。 而SPARC架構(gòu)由于其良好的可擴展性，非常適合與JOP核構(gòu)建異構(gòu)多核系統(tǒng)，提升系統(tǒng)性能，滿足人們更多的需求。 對于構(gòu)建好的異構(gòu)多核系統(tǒng)，，進(jìn)行基準(zhǔn)測試是非常必要的，現(xiàn)行的Caffeinemark基準(zhǔn)測試僅僅測試幾項Java特性，不包括浮點運算、垃圾收集和多線程這些項目，而這些測試對于嵌入式開發(fā)人員來說可能很重要。Jembench基準(zhǔn)測試中又不包含邏輯測試，并且Jembench中包含的應(yīng)用測試與流測試過于復(fù)雜，對于小型嵌入式Java處理器來說并不需要太復(fù)雜的應(yīng)用程序測試，因此，如何設(shè)計出更好基準(zhǔn)測試來進(jìn)行性能測試更是當(dāng)前研究的熱點。 此外，基準(zhǔn)測試的流程也很重要，清晰的測試流程使得測試進(jìn)行更加有目的性，防止冗余測試的產(chǎn)生，并且可以為他人的使用提供便利。對于測試中可能存在的問題在流程設(shè)計時都要予以考慮。 本文在分析SPARC架構(gòu)，JOP核結(jié)構(gòu)的基礎(chǔ)上，對單核和多核模式進(jìn)行了系統(tǒng)設(shè)計，并且對現(xiàn)行的Caffeinemark基準(zhǔn)測試與Jembench基準(zhǔn)測試進(jìn)行了研究，結(jié)合兩者的優(yōu)點，完成了新基準(zhǔn)測試Newbench的設(shè)計編寫，完善了基準(zhǔn)測試方案，更能進(jìn)一步的進(jìn)行Java兼容性評估。 最后，本文擬定了預(yù)期的性能指標(biāo)，并設(shè)計了詳細(xì)的基準(zhǔn)測試流程，通過模擬和開發(fā)板的實際執(zhí)行獲得準(zhǔn)確的性能參數(shù)結(jié)果，為系統(tǒng)的性能優(yōu)化提供了更好的支持。
[Abstract]:Nowadays, with the rapid development of embedded technology, the number of embedded technology is increasing day by day, and the application is gradually infiltrated into every corner of people's life. At the same time, Java plays a more and more important role in embedded because of its outstanding advantages. Java processor eliminates the work of converting Java bytecode into machine code, and can also provide special hardware support according to the characteristics of Java virtual machine, so it has the characteristics of direct hardware execution of Java bytecode, high efficiency execution, less memory consumption and low power consumption. It is more suitable for embedded devices with limited resources, and is suitable for heterogeneous methods to improve the performance of the system. The JOP processor takes only one Java bytecode per clock cycle, and considering the needs of WCET (worstcase execution time) analysis, the instruction Cache is specially designed to make it the least resource consuming Java processor so far. Generally speaking, it is more suitable to select JOP for embedded environment with shortage of resources. Because of its good scalability, SPARC architecture is very suitable for building heterogeneous multi-core system with JOP core to improve system performance and meet more needs of people. Benchmarking is necessary for a built heterogeneous multi-core system. The current Caffeinemark benchmark tests only a few Java features, excluding floating-point operations, garbage collection and multithreading, which may be important to embedded developers. Jembench benchmark does not include logical tests, and the application tests and flow tests included in Jembench are too complex. For small embedded Java processors, there is no need for complex application testing, so how to design a better benchmark to carry out performance testing is the focus of current research. In addition, the process of benchmark testing is also very important. A clear test process makes the test more purposeful, prevents redundant testing, and can facilitate the use of others. Possible problems in testing should be taken into account in process design. Based on the analysis of SPARC architecture and JOP core structure, this paper designs the system of single core and multi-core mode, and studies the current Caffeinemark benchmark and Jembench benchmark. Combined with the advantages of the two, the design and compilation of the new benchmark Newbench is completed, the benchmark scheme is improved, and the Java compatibility evaluation can be further carried out. Finally, this paper formulates the expected performance index, and designs the detailed benchmark testing flow, through the simulation and the actual execution of the development board to obtain the accurate performance parameter results, which provides better support for the performance optimization of the system.
【學(xué)位授予單位】：哈爾濱工業(yè)大學(xué)
【學(xué)位級別】：碩士
【學(xué)位授予年份】：2012
【分類號】：TP332;TP312.1

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