【摘要】：隨著信息產(chǎn)業(yè)的發(fā)展，近年來(lái)數(shù)字信號(hào)處理學(xué)科發(fā)展迅速。DSP處理器在數(shù)字通信、信號(hào)處理、雷達(dá)、電子對(duì)抗、圖像處理等方面得到了廣泛的應(yīng)用。在DSP快速發(fā)展的新形勢(shì)下，面臨處理速度更高，功能更全，功耗更低，存儲(chǔ)器用量更少的要求。多通道結(jié)構(gòu)和單指令多重?cái)?shù)據(jù)（SIMD）、超長(zhǎng)指令字結(jié)構(gòu)（VLIM）、超標(biāo)量結(jié)構(gòu)、超流水結(jié)構(gòu)、多處理、多線程及可并行擴(kuò)展的超級(jí)哈佛結(jié)構(gòu)在高性能處理器將占據(jù)主導(dǎo)地位。在DSP開(kāi)發(fā)過(guò)程中，，對(duì)其性能的評(píng)估是一項(xiàng)十分重要的工作。鑒于MIPS這樣的傳統(tǒng)量度越來(lái)越不精確，且DSP應(yīng)用程序的特征之一是大部分的處理工作集中在程序的一部分（核心程序），因此選取信號(hào)處理相關(guān)的基準(zhǔn)程序來(lái)測(cè)試評(píng)估DSP處理器。 XXX-DSP是一款國(guó)產(chǎn)面向終端應(yīng)用的高性能、低功耗、具有自主知識(shí)產(chǎn)權(quán)的嵌入式DSP IP的多內(nèi)核處理器，本文通過(guò)驗(yàn)證基準(zhǔn)評(píng)測(cè)程序的運(yùn)行情況，評(píng)估XXX-DSP的運(yùn)算性能，論文主要論述了以下內(nèi)容： 首先簡(jiǎn)要介紹了XXX-DSP以及SIMD技術(shù)的發(fā)展?fàn)顩r，針對(duì)XXX-DSP大致介紹了其系統(tǒng)架構(gòu)并對(duì)其內(nèi)核各個(gè)功能模塊作了簡(jiǎn)要分析； 論文重點(diǎn)對(duì)核心基準(zhǔn)程序算法進(jìn)行定點(diǎn)仿真，并根據(jù)該DSP特有的SIMD指令集對(duì)程序算法進(jìn)行優(yōu)化，最終在板級(jí)驗(yàn)證平臺(tái)上運(yùn)行，驗(yàn)證了其加速優(yōu)勢(shì)。 通過(guò)本文中的仿真驗(yàn)證及比較分析，完成了對(duì)該DSP的功能性驗(yàn)證，證實(shí)了其SIMD結(jié)構(gòu)的加速效果，并對(duì)板級(jí)仿真結(jié)果進(jìn)行了詳細(xì)分析，最終完成了對(duì)該DSP的測(cè)試任務(wù)。
[Abstract]:With the development of information industry, the subject of digital signal processing has developed rapidly in recent years. DSP processor has been widely used in digital communication, signal processing, radar, electronic countermeasures, image processing and so on. Under the new situation of rapid development of DSP, it is faced with the requirements of higher processing speed, more complete function, lower power consumption and less memory consumption. Multi-channel structure and single instruction multi-data (SIMD), super-long instruction word structure (VLIM), superscalar structure, super pipeline structure, multi-processing, multi-thread and parallel extensible super Harvard structure will dominate the high performance processor. In the process of DSP development, the evaluation of its performance is a very important work. In view of the fact that traditional metrics such as MIPS are becoming more and more inaccurate, and one of the characteristics of DSP applications is that most of the processing is focused on part of the program (core programs), Therefore, the reference program related to signal processing is selected to test and evaluate the DSP processor. XXX-DSP is a domestic embedded DSP IP multi-core processor with high performance, low power consumption and independent intellectual property rights for terminal applications. This paper evaluates the operation performance of XXX-DSP by verifying the operation of the benchmark evaluation program. This paper mainly discusses the following contents: firstly, the development of XXX-DSP and SIMD technology is briefly introduced, its system architecture is briefly introduced for XXX-DSP, and each functional module of its kernel is briefly analyzed. This paper focuses on the fixed-point simulation of the core benchmark program algorithm, and optimizes the program algorithm according to the DSP unique SIMD instruction set, and finally runs on the board-level verification platform to verify its acceleration advantage. Through the simulation verification and comparative analysis in this paper, the functional verification of the DSP is completed, the acceleration effect of the SIMD structure is verified, and the board level simulation results are analyzed in detail. Finally, the test task of the DSP is completed.
【學(xué)位授予單位】：西安電子科技大學(xué)
【學(xué)位級(jí)別】：碩士
【學(xué)位授予年份】：2012
【分類號(hào)】：TP368.1

【參考文獻(xiàn)】

相關(guān)期刊論文 前2條

1 高鷹,謝勝利;一種變步長(zhǎng)LMS自適應(yīng)濾波算法及分析[J];電子學(xué)報(bào);2001年08期

2 趙順珍;馬英;;基于DSP的FIR數(shù)字濾波器設(shè)計(jì)與實(shí)現(xiàn)[J];微計(jì)算機(jī)信息;2009年05期

本文編號(hào)：2494888