【摘要】：隨著網(wǎng)絡(luò)通信和計(jì)算機(jī)科學(xué)技術(shù)的迅猛發(fā)展，在各個信息科學(xué)領(lǐng)域?qū)τ贗/O總線的性能要求也越來越高，傳統(tǒng)的I/O總線已逐漸滿足不了現(xiàn)有的需求，于是PCI Express作為第三代I/O互連總線的代表受到了廣泛的關(guān)注，它兼?zhèn)淞烁咝阅�、高擴(kuò)展性、高可靠性以及低成本等特點(diǎn)，廣泛應(yīng)用于移動通訊、航天航空、工業(yè)自動化控制等領(lǐng)域。 本文首先介紹了I/O總線的發(fā)展歷程以及國內(nèi)外研究現(xiàn)狀，，并著重提出了PCIExpress總線的技術(shù)優(yōu)勢，然后闡述了PCI Express總線的協(xié)議規(guī)范、拓?fù)浣Y(jié)構(gòu)、設(shè)備層次、事務(wù)機(jī)制以及錯誤處理方式，并以此為理論基礎(chǔ)經(jīng)過論證比較提出了基于FPGA的PCI Express接口設(shè)計(jì)方案，從模塊設(shè)計(jì)、功能仿真、邏輯優(yōu)化、驅(qū)動開發(fā)和應(yīng)用程序開發(fā)五個方面做了詳細(xì)的介紹，最后對系統(tǒng)的單次讀寫、DMA讀寫、DMA讀寫速度進(jìn)行了完整的測試和驗(yàn)證，結(jié)果表明所設(shè)計(jì)的PCIExpress接口達(dá)到了設(shè)計(jì)要求，兼?zhèn)淞溯^高的性能和速度。
[Abstract]:With the rapid development of network communication and computer science and technology, the performance requirements of I / O bus are becoming higher and higher in all fields of information science. The traditional I / O bus has been unable to meet the existing needs. Therefore, PCI Express, as the representative of the third generation I / O interconnection bus, has received extensive attention. It has the characteristics of high performance, high expansibility, high reliability and low cost, so it is widely used in mobile communication, aerospace, and so on. Industrial automation control and other fields. This paper first introduces the development of I / O bus and the current research situation at home and abroad, and puts forward the technical advantages of PCIExpress bus, and then expounds the protocol specification, topology structure, device level of PCI Express bus. The transaction mechanism and error handling method are discussed and compared with each other on the basis of theory. The design scheme of PCI Express interface based on FPGA is put forward, which includes module design, function simulation, logic optimization, and so on. Five aspects of driver development and application development are introduced in detail. Finally, the system single read and write, DMA read and write speed are tested and verified. The results show that the designed PCIExpress interface meets the design requirements. It also has high performance and speed.
【學(xué)位授予單位】：西安電子科技大學(xué)
【學(xué)位級別】：碩士
【學(xué)位授予年份】：2013
【分類號】：TP336

【參考文獻(xiàn)】

相關(guān)期刊論文 前5條

1 徐君明,裴先登,王海衛(wèi),黃浩;高性能計(jì)算機(jī)I/O技術(shù)PCI Express分析[J];計(jì)算機(jī)工程;2004年12期

2 孟會;劉雪峰;;PCI Express總線技術(shù)分析[J];計(jì)算機(jī)工程;2006年23期

3 許軍;李玉山;賀占莊;許西榮;;PCI-Express總線技術(shù)研究[J];計(jì)算機(jī)工程與科學(xué);2006年05期

4 陳乃塘;;PCI Express的前世與今生——接口演化史[J];電子測試;2003年10期

5 林錦棠;敖發(fā)良;;PCI Express研究及基于FPGA的實(shí)現(xiàn)[J];微計(jì)算機(jī)信息;2008年29期

相關(guān)碩士學(xué)位論文 前3條

1 萬毅;存儲區(qū)域網(wǎng)絡(luò)中FC加密卡的設(shè)計(jì)與實(shí)現(xiàn)[D];電子科技大學(xué);2009年

2 任連芳;基于PCI Express總線的數(shù)據(jù)傳輸與存儲[D];南京理工大學(xué);2010年

3 張亮;PCI Express協(xié)議的實(shí)現(xiàn)與驗(yàn)證[D];西安電子科技大學(xué);2012年

本文編號：2426847