一種電阻式觸摸屏驅(qū)動芯片的設(shè)計研究
發(fā)布時間：2019-01-28 23:09
【摘要】：隨著微電子技術(shù)和計算機技術(shù)的迅速發(fā)展,觸摸屏技術(shù)逐漸代替了傳統(tǒng)的機械裝置，成為眾多電子產(chǎn)品的控制裝置。觸摸屏本身比較輕便，能夠有效的節(jié)約空間，操作簡單，因此具有傳統(tǒng)鍵盤不可替代的優(yōu)點。同時觸摸屏技術(shù)能夠讓人直接的對屏幕進行操作控制，，提供了一種絕對的操作模式，極大的方便了用戶。配上觸摸屏幕多彩的視覺效果，給人十分舒適的操作享受。在眾多觸摸屏產(chǎn)品中，電阻式觸摸屏由于價格低、清晰度高、堅固耐用等特點,在市場上的占有率居高不下。 本文基于四線電阻式觸摸屏，設(shè)計了一款觸摸屏驅(qū)動芯片。整個芯片包括ADC模塊、片內(nèi)溫度測量模塊、電池監(jiān)控模塊、六路通道選擇器、數(shù)字控制模塊和內(nèi)部電壓基準(zhǔn)模塊，芯片的核心是一個12位的數(shù)模轉(zhuǎn)換器（ADC）。在保證版圖面積小的前提下，設(shè)計出低功耗、高精度的ADC是本文設(shè)計的主要工作。在不同種類的ADC中，逐次逼近式ADC轉(zhuǎn)換速度快、精度高、功耗較低，因此本文采用了12位逐次逼近式ADC作為芯片的核心。本文設(shè)計的逐次逼近式ADC基于電荷按比例縮放式數(shù)模轉(zhuǎn)換器（DAC），并采用了開關(guān)電容比較器，通過精確的時鐘控制，大大地降低了ADC功耗。在內(nèi)部基準(zhǔn)模塊中，設(shè)計了帶隙基準(zhǔn)作為內(nèi)部電壓基準(zhǔn)源。同時本文設(shè)計的芯片也可以在內(nèi)部基準(zhǔn)和外部基準(zhǔn)之間進行切換以達到降低功耗的作用。通過合理設(shè)計，使得整個芯片的分辨率高，又保持了較低的功耗。 本文的芯片設(shè)計采用了世界領(lǐng)先的臺積電(TSMC)65nm的工藝，在設(shè)計過程中首先在Cadence環(huán)境下完成了電路的圖像化描述，然后運用Synopsys公司下的Hspice軟件進行了電路的仿真，最后運用Cadence環(huán)境下的virtuoso進行了版圖的設(shè)計，并運用了Mentor公司的Calibre軟件對版圖進行驗證工作。在整個設(shè)計過程中，充分發(fā)揮每種集成電路設(shè)計軟件的優(yōu)點，極大的提高了設(shè)計工作的效率，也盡量減小了在設(shè)計工作中可能存在的設(shè)計偏差。 在芯片的仿真工作中，各個模塊的性能十分理想。整個芯片具有精度高、功耗低、版圖面積小的特點。芯片已經(jīng)流片，未來將會出現(xiàn)在觸摸屏移動終端中。
[Abstract]:With the rapid development of microelectronics and computer technology, touch screen technology has gradually replaced the traditional mechanical devices and become the control device of many electronic products. Touch screen itself is portable, can effectively save space, simple operation, so it has the advantages of traditional keyboard irreplaceable. At the same time, touch screen technology can directly control the screen, providing an absolute mode of operation, which greatly facilitates the user. With touch screen colorful visual effects, give people very comfortable to enjoy the operation. Among many touch screen products, resistive touch screen has a high market share due to its low price, high definition and durability. Based on four-wire resistive touch screen, a touch screen driver chip is designed in this paper. The whole chip includes ADC module, in-chip temperature measurement module, battery monitoring module, six-channel selector, digital control module and internal voltage reference module. The core of the chip is a 12-bit digital-to-analog converter (ADC). On the premise of small layout area, the design of low power and high precision ADC is the main work of this paper. In different kinds of ADC, the successive approximation ADC conversion speed is fast, the precision is high, and the power consumption is low. Therefore, the 12-bit successive approximation ADC is used as the core of the chip in this paper. The successive approximation ADC designed in this paper is based on the charge scaling (DAC), and uses the switched capacitor comparator. The power consumption of the ADC is greatly reduced by precise clock control. In the internal reference module, the bandgap reference is designed as the internal voltage reference source. At the same time, the chip designed in this paper can also switch between internal reference and external reference to reduce power consumption. Through reasonable design, the resolution of the whole chip is high and the power consumption is low. In this paper, the chip design adopts the world leading TSMC (TSMC) 65nm technology. In the design process, the circuit is described graphically under the Cadence environment, and then the circuit is simulated by the Hspice software of Synopsys Company. Finally, the layout is designed by using virtuoso in Cadence environment, and the layout is verified by Calibre software of Mentor Company. In the whole design process, the advantages of each integrated circuit design software are brought into full play, the efficiency of the design work is greatly improved, and the possible design deviation in the design work is reduced as far as possible. In the simulation of the chip, the performance of each module is very ideal. The whole chip has the characteristics of high precision, low power consumption and small layout area. The chip has been streaming and will appear in touch-screen mobile terminals in the future.
【學(xué)位授予單位】：遼寧大學(xué)
【學(xué)位級別】：碩士
【學(xué)位授予年份】：2012
【分類號】：TP334.3;TN47
本文編號：2417401
[Abstract]:With the rapid development of microelectronics and computer technology, touch screen technology has gradually replaced the traditional mechanical devices and become the control device of many electronic products. Touch screen itself is portable, can effectively save space, simple operation, so it has the advantages of traditional keyboard irreplaceable. At the same time, touch screen technology can directly control the screen, providing an absolute mode of operation, which greatly facilitates the user. With touch screen colorful visual effects, give people very comfortable to enjoy the operation. Among many touch screen products, resistive touch screen has a high market share due to its low price, high definition and durability. Based on four-wire resistive touch screen, a touch screen driver chip is designed in this paper. The whole chip includes ADC module, in-chip temperature measurement module, battery monitoring module, six-channel selector, digital control module and internal voltage reference module. The core of the chip is a 12-bit digital-to-analog converter (ADC). On the premise of small layout area, the design of low power and high precision ADC is the main work of this paper. In different kinds of ADC, the successive approximation ADC conversion speed is fast, the precision is high, and the power consumption is low. Therefore, the 12-bit successive approximation ADC is used as the core of the chip in this paper. The successive approximation ADC designed in this paper is based on the charge scaling (DAC), and uses the switched capacitor comparator. The power consumption of the ADC is greatly reduced by precise clock control. In the internal reference module, the bandgap reference is designed as the internal voltage reference source. At the same time, the chip designed in this paper can also switch between internal reference and external reference to reduce power consumption. Through reasonable design, the resolution of the whole chip is high and the power consumption is low. In this paper, the chip design adopts the world leading TSMC (TSMC) 65nm technology. In the design process, the circuit is described graphically under the Cadence environment, and then the circuit is simulated by the Hspice software of Synopsys Company. Finally, the layout is designed by using virtuoso in Cadence environment, and the layout is verified by Calibre software of Mentor Company. In the whole design process, the advantages of each integrated circuit design software are brought into full play, the efficiency of the design work is greatly improved, and the possible design deviation in the design work is reduced as far as possible. In the simulation of the chip, the performance of each module is very ideal. The whole chip has the characteristics of high precision, low power consumption and small layout area. The chip has been streaming and will appear in touch-screen mobile terminals in the future.
【學(xué)位授予單位】：遼寧大學(xué)
【學(xué)位級別】：碩士
【學(xué)位授予年份】：2012
【分類號】：TP334.3;TN47
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