【摘要】：隨著集成電路制造工藝不斷進(jìn)步，處理器設(shè)計(jì)已經(jīng)進(jìn)入了SoC時(shí)代。由于異步電路沒(méi)有時(shí)鐘，具有功耗低、速度快、兼容性好和抗電磁干擾等特點(diǎn)，近年來(lái)又成為研究的目標(biāo)。 本文對(duì)異步電路系統(tǒng)設(shè)計(jì)的關(guān)鍵技術(shù)進(jìn)行了研究，討論了異步電路握手協(xié)議、異步電路延時(shí)模型和基于異步語(yǔ)言Balsa的設(shè)計(jì)方法。在對(duì)微控制器指令系統(tǒng)、內(nèi)核結(jié)構(gòu)、執(zhí)行過(guò)程深入分析的基礎(chǔ)上，按照自頂向下的模塊化設(shè)計(jì)流程，，完成了微處理器的算術(shù)邏輯單元，寄存器，譯碼器等關(guān)鍵模塊的設(shè)計(jì)，實(shí)現(xiàn)了采用異步Balsa語(yǔ)言設(shè)計(jì)的異步微處理器核，并在Xilinx的集成環(huán)境下對(duì)全異步微處理器進(jìn)行了功能仿真。 為了與資源豐富的同步IP組成SoC系統(tǒng)，論文在接口設(shè)計(jì)中，提出了同異步接口設(shè)計(jì)方法，并完成基于四項(xiàng)雙軌協(xié)議的同步轉(zhuǎn)異步、異步轉(zhuǎn)同步的接口設(shè)計(jì)，并應(yīng)用于設(shè)計(jì)的異步微處理器。 本文設(shè)計(jì)的全異步微處理器，在指令的執(zhí)行效率、最高握手頻率、靜態(tài)功耗和抗干擾方面都有一定優(yōu)勢(shì)。采用的基于異步語(yǔ)言Balsa的設(shè)計(jì)方法對(duì)異步電路的設(shè)計(jì)和應(yīng)用具有一定的實(shí)用價(jià)值。
[Abstract]:With the continuous progress of IC manufacturing technology, processor design has entered the SoC era. Because asynchronous circuit has no clock, low power consumption, high speed, good compatibility and anti-electromagnetic interference, it has become a research target in recent years. In this paper, the key technologies of asynchronous circuit system design are studied, and the handshake protocol of asynchronous circuit, the asynchronous circuit delay model and the design method based on asynchronous language Balsa are discussed. On the basis of deep analysis of instruction system, kernel structure and execution process of microcontroller, according to the top-down modular design flow, the key modules of microprocessor, such as arithmetic logic unit, register, decoder and so on, are designed. The asynchronous microprocessor core designed by asynchronous Balsa language is implemented, and the functional simulation of the full asynchronous microprocessor is carried out under the integrated environment of Xilinx. In order to make up SoC system with resource-rich synchronous IP, this paper presents the design method of synchronous interface in interface design, and completes the design of synchronous asynchronous and asynchronous synchronous interface based on four two-track protocols. And used in the design of asynchronous microprocessor. The full asynchronous microprocessor designed in this paper has some advantages in command execution efficiency, maximum handshake frequency, static power consumption and anti-interference. The design method based on asynchronous language Balsa has certain practical value for the design and application of asynchronous circuit.
【學(xué)位授予單位】：西安電子科技大學(xué)
【學(xué)位級(jí)別】：碩士
【學(xué)位授予年份】：2013
【分類號(hào)】：TP332

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本文編號(hào)：2398565