一種降低DRAM系統(tǒng)刷新功耗的混合主存設計
發(fā)布時間：2018-11-23 17:11
【摘要】：傳統(tǒng)計算機體系結構中主存由動態(tài)隨機存取存儲器(DRAM)構成,而DRAM的刷新功耗隨容量的增大而急劇增大.為應對這一問題,業(yè)界開始關注新型非易失性存儲器(NVM).NVM具有掉電后數據不會丟失、不需刷新的優(yōu)勢,然而它們仍然處于研究階段,單顆芯片的容量和價格不足以媲美DRAM,距離大批量投入商用仍有一段距離,因此,DRAM和NVM的新型混合主存結構被認為是下一代主存.本文提出一種SignificanceAware Pages Allocation(SA-PA)混合主存設計方案,通過將關鍵頁分配到DRAM中,非關鍵頁分配到相變存儲器(PCM)中,采用DRAM和PCM并行結構,并采用Reset-Speed技術提高PCM的寫速度,從而實現在不過分降低系統(tǒng)性能的前提下降低系統(tǒng)功耗的目的.結果表明,本文提出的SA-PA混合主存結構使得系統(tǒng)功耗平均下降25.78%,而系統(tǒng)性能僅下降1.34%.
[Abstract]:In the traditional computer architecture, the main memory is composed of dynamic random access memory (DRAM), and the refresh power of DRAM increases sharply with the increase of capacity. In order to deal with this problem, the industry began to pay attention to the advantage that the new non-volatile memory (NVM). NVM has the advantage that the data will not be lost and need not be refreshed after power down, but they are still in the research stage. The capacity and price of a single chip is not comparable to that of DRAM,. Therefore, the new hybrid main memory architecture of DRAM and NVM is considered to be the next generation of main memory. In this paper, a SignificanceAware Pages Allocation (SA-PA) hybrid main memory design scheme is proposed. By allocating key pages to DRAM and non-critical pages to phase change memory (PCM), a parallel structure of DRAM and PCM is adopted. Reset-Speed technology is used to improve the write speed of PCM, so that the power consumption of the system can be reduced without excessively reducing the performance of the system. The results show that the proposed SA-PA hybrid main memory structure can reduce the power consumption of the system by 25.78, while the performance of the system only drops by 1.34.
【作者單位】： 復旦大學專用集成電路與系統(tǒng)國家重點實驗室;
【分類號】：TP333
，
本文編號：2352184
[Abstract]:In the traditional computer architecture, the main memory is composed of dynamic random access memory (DRAM), and the refresh power of DRAM increases sharply with the increase of capacity. In order to deal with this problem, the industry began to pay attention to the advantage that the new non-volatile memory (NVM). NVM has the advantage that the data will not be lost and need not be refreshed after power down, but they are still in the research stage. The capacity and price of a single chip is not comparable to that of DRAM,. Therefore, the new hybrid main memory architecture of DRAM and NVM is considered to be the next generation of main memory. In this paper, a SignificanceAware Pages Allocation (SA-PA) hybrid main memory design scheme is proposed. By allocating key pages to DRAM and non-critical pages to phase change memory (PCM), a parallel structure of DRAM and PCM is adopted. Reset-Speed technology is used to improve the write speed of PCM, so that the power consumption of the system can be reduced without excessively reducing the performance of the system. The results show that the proposed SA-PA hybrid main memory structure can reduce the power consumption of the system by 25.78, while the performance of the system only drops by 1.34.
【作者單位】： 復旦大學專用集成電路與系統(tǒng)國家重點實驗室;
【分類號】：TP333
，
本文編號：2352184
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