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DMA控制器的仿真與驗(yàn)證

發(fā)布時間:2018-10-31 14:08
【摘要】:隨著IC(Integated Circuit)設(shè)計(jì)的規(guī)模和復(fù)雜度的不斷增大,基于IP(IntellectualProperty)核復(fù)用的SoC(SystemOn Chip)設(shè)計(jì)技術(shù)方法開始成為主流。與此同時,業(yè)界也開始越來越關(guān)注IP核的驗(yàn)證方法。 圍繞這個問題,通過研究當(dāng)前主要的驗(yàn)證方法和技術(shù),并且基于在中航工業(yè)631所的實(shí)習(xí)工作,總結(jié)出了對IP核進(jìn)行充分驗(yàn)證的方法,其中包括對IP的模塊級驗(yàn)證,對IP所在系統(tǒng)的系統(tǒng)級驗(yàn)證,系統(tǒng)級驗(yàn)證又分為虛擬平臺驗(yàn)證和FPGA平臺驗(yàn)證。通過幾種不同的驗(yàn)證并結(jié)合分析,能夠提高IP核驗(yàn)證的效率和可靠性。 本論文主要研究了SoC的軟硬件協(xié)同驗(yàn)證設(shè)計(jì)方法與驗(yàn)證技術(shù),構(gòu)建了適合于驗(yàn)證SoC芯片的以下兩種驗(yàn)證平臺,即FPGA原型驗(yàn)證平臺和虛擬原型驗(yàn)證平臺,這兩種驗(yàn)證平臺的優(yōu)勢可以互補(bǔ),有效提高了驗(yàn)證的效率和質(zhì)量。把這兩者結(jié)合可以得到效率的平衡和很好的效果。 基于上述所說兩種驗(yàn)證平臺的搭建,本論文從客觀和主觀評定角度出發(fā),對DMA控制器這一IP核做了相關(guān)的模塊級驗(yàn)證和系統(tǒng)級驗(yàn)證,重點(diǎn)驗(yàn)證此IP核功能的正確性。首先將DMA與應(yīng)用到系統(tǒng)中時的周邊幾個模塊,比如內(nèi)部存儲器控制器、外部存儲器控制器等進(jìn)行模塊級驗(yàn)證,模塊級驗(yàn)證是保證硬件上的每一個模塊能夠正?煽康墓ぷ,是實(shí)現(xiàn)芯片能正常工作的基礎(chǔ)。通過模塊級的驗(yàn)證,DMA控制器的功能覆蓋率和代碼覆蓋率都符合要求。 在模塊級測試完成后,對DMA進(jìn)行系統(tǒng)級的驗(yàn)證。系統(tǒng)級的驗(yàn)證的重點(diǎn)不再是各IP/模塊的某個獨(dú)立的功能點(diǎn)是否正確,而是各個模塊之間的互動操作,,通過整個系統(tǒng)的各個功能模塊協(xié)同運(yùn)行驗(yàn)證,即虛擬平臺驗(yàn)證和FPGA平臺驗(yàn)證。通過這兩種不同平臺的驗(yàn)證,來充分保證DMA控制器功能的正確性。系統(tǒng)級測試完成之后,經(jīng)過項(xiàng)目組的評審,對DMA控制器這一模塊功能的驗(yàn)證比較全面,系統(tǒng)級測試結(jié)果達(dá)到要求。
[Abstract]:With the increasing scale and complexity of IC (Integated Circuit) design, SoC (SystemOn Chip) design technology based on IP (IntellectualProperty) core reuse has become the mainstream. At the same time, the industry also began to pay more and more attention to IP core verification methods. Around this problem, by studying the current main verification methods and techniques, and based on the practice work in China Aviation Industry 631 Institute, this paper summarizes the method of full verification of IP core, including the module level verification of IP. The system level verification of IP system is divided into virtual platform verification and FPGA platform verification. The efficiency and reliability of IP kernel verification can be improved by several kinds of verification and analysis. This paper mainly studies the design method and verification technology of hardware / software co-verification of SoC, and constructs two kinds of verification platforms suitable for SoC chip, that is, FPGA prototype verification platform and virtual prototype verification platform. These two verification platforms can complement each other and improve the efficiency and quality of verification. The combination of the two can achieve a balance of efficiency and good results. Based on the above two kinds of verification platform, this paper does the module level verification and the system level verification on the IP kernel of DMA controller from the angle of objective and subjective evaluation, and emphatically verifies the correctness of the function of the IP core. First of all, the DMA and the peripheral modules when applied to the system, such as internal memory controller, external memory controller, etc. are verified at the module level. The module level verification is to ensure that each module on the hardware can work normally and reliably. Is the realization chip can work normally the foundation. The functional coverage and code coverage of the DMA controller meet the requirements through module level verification. After the module level test is completed, the DMA is verified at the system level. The emphasis of system-level verification is no longer the correctness of an independent function point of each IP/ module, but the interactive operation of each module, which is verified by the cooperative operation of each functional module of the whole system. Virtual platform verification and FPGA platform verification. Through the verification of these two different platforms, the correctness of DMA controller function can be fully guaranteed. After the system level test is completed, the function of the DMA controller module is verified comprehensively by the project team, and the system level test results meet the requirements.
【學(xué)位授予單位】:西安電子科技大學(xué)
【學(xué)位級別】:碩士
【學(xué)位授予年份】:2013
【分類號】:TP332;TN47

【參考文獻(xiàn)】

相關(guān)期刊論文 前5條

1 焦影,周祖成;PBD-SOC實(shí)現(xiàn)的一種重要途徑[J];電子產(chǎn)品世界;2001年02期

2 段然;梁婕;;SoC系統(tǒng)驗(yàn)證方法研究[J];航天控制;2009年03期

3 梁科;李國峰;王錦;董海坤;高靜;秦世才;;通用多通道高性能DMA控制器設(shè)計(jì)[J];天津大學(xué)學(xué)報;2008年05期

4 崔云飛,徐U

本文編號:2302468


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