基于FPGA的高性能網(wǎng)絡(luò)處理卡的研究
發(fā)布時(shí)間：2018-10-07 20:07
【摘要】：隨著我國(guó)經(jīng)濟(jì)的發(fā)展，對(duì)網(wǎng)絡(luò)的應(yīng)用要求也越來(lái)越高，普通網(wǎng)卡的數(shù)據(jù)吞吐量已經(jīng)不能滿足某些特殊場(chǎng)合的特殊應(yīng)用，當(dāng)普通網(wǎng)卡短時(shí)間內(nèi)去處理大量網(wǎng)絡(luò)數(shù)據(jù)包時(shí)，經(jīng)常會(huì)出現(xiàn)丟包現(xiàn)象。本文將FPGA技術(shù)和以太網(wǎng)技術(shù)相結(jié)合，將FPGA的嵌入式以太網(wǎng)MAC技術(shù)應(yīng)用到以太網(wǎng)中，，研究和設(shè)計(jì)出一種高性能網(wǎng)絡(luò)處理卡去替換普通網(wǎng)卡，大大提高了網(wǎng)絡(luò)數(shù)據(jù)吞吐量，徹底解決了丟包現(xiàn)象，滿足了某些特殊場(chǎng)合的特殊應(yīng)用。 論文首先對(duì)當(dāng)前常用的網(wǎng)絡(luò)數(shù)據(jù)包處理技術(shù)進(jìn)行了介紹和說(shuō)明，同時(shí)分析了國(guó)內(nèi)外的研究現(xiàn)狀和高性能網(wǎng)絡(luò)處理卡的現(xiàn)實(shí)意義。 其次，論文分析了總線主控DMA技術(shù)。使用總線主控DMA技術(shù)的主要目的就是把PC上位機(jī)端的以太網(wǎng)絡(luò)數(shù)據(jù)包高效地傳輸?shù)降讓舆壿嬁刂撇糠只蛘甙训讓舆壿嬁刂撇糠种械囊蕴W(wǎng)絡(luò)數(shù)據(jù)包高效地傳輸?shù)絇C上位機(jī)端。在PC上位機(jī)端的測(cè)試應(yīng)用程序中組裝好以太網(wǎng)絡(luò)數(shù)據(jù)包后，首先調(diào)用上層API函數(shù)中的SendPacket發(fā)送以太網(wǎng)絡(luò)數(shù)據(jù)包函數(shù)，然后在SendPacket函數(shù)中調(diào)用基于DMA傳輸模式的PCI Express驅(qū)動(dòng)程序中的相關(guān)函數(shù)，最后使用總線主控DMA技術(shù)的DMA傳輸方式把以太網(wǎng)絡(luò)數(shù)據(jù)包傳輸?shù)降讓舆壿嬁刂撇糠种�。然而，�?dāng)?shù)讓舆壿嬁刂撇糠种杏幸蕴W(wǎng)絡(luò)數(shù)據(jù)包需要被傳送到PC上位機(jī)端時(shí)，首先利用總線主控DMA技術(shù)的DMA傳輸方式把這些以太網(wǎng)絡(luò)數(shù)據(jù)包上傳到PC上位機(jī)端的驅(qū)動(dòng)層程序中，然后調(diào)用基于DMA傳輸模式的PCI Express驅(qū)動(dòng)程序中的相關(guān)函數(shù)把這些以太網(wǎng)絡(luò)數(shù)據(jù)包傳輸?shù)缴蠈覣PI函數(shù)中的RecvPacket函數(shù)中，最后測(cè)試應(yīng)用程序直接到RecvPacket函數(shù)中獲取以太網(wǎng)絡(luò)數(shù)據(jù)包，并進(jìn)行分析。 然后，論文以XC6VLX240TFF1156-1FPGA主芯片為核心處理部件搭建了系統(tǒng)的硬件平臺(tái)，該硬件裝置主要包括PCI Express X8插片、外圍存儲(chǔ)設(shè)備、以太網(wǎng)端口、JTAG以及電源，重點(diǎn)介紹了各個(gè)模塊之間的連接關(guān)系。 最后，在該平臺(tái)下，進(jìn)行了軟件的設(shè)計(jì)。設(shè)計(jì)中使用了總線主控DMA設(shè)計(jì)技術(shù)和ISE自帶的IP核，軟件主要完成的功能有：以太網(wǎng)絡(luò)數(shù)據(jù)包的發(fā)送、以太網(wǎng)絡(luò)數(shù)據(jù)包的接收及以太網(wǎng)絡(luò)數(shù)據(jù)包的過(guò)濾。此外對(duì)軟件做了大量的優(yōu)化測(cè)試工作，提高了程序的運(yùn)行速度，基本滿足實(shí)時(shí)需求，得到了較理想的實(shí)驗(yàn)效果。
[Abstract]:With the development of economy in our country, the requirement of network application is more and more high. The data throughput of ordinary network card can not meet the special application in some special occasions. When the ordinary network card processes a large number of network data packets in a short time, Often happens the phenomenon of packet loss. In this paper, FPGA technology and Ethernet technology are combined, FPGA embedded Ethernet MAC technology is applied to Ethernet, and a high performance network processing card is designed to replace the common network card, which greatly improves the network data throughput. The problem of packet loss is solved thoroughly and the special application of some special occasions is satisfied. Firstly, the paper introduces and explains the commonly used network packet processing technology, and analyzes the domestic and foreign research status and the practical significance of the high performance network processing card. Secondly, the paper analyzes the bus master DMA technology. The main purpose of using the bus master DMA technology is to efficiently transmit the Ethernet data packet from the PC upper computer to the bottom logic control part or the Ethernet network data packet from the underlying logic control part to the PC upper computer. After assembling the Ethernet network data packet in the test application program of the PC upper computer, the SendPacket in the upper API function is first called to send the Ethernet network packet function. Then the related functions in the PCI Express driver based on the DMA transmission mode are called in the SendPacket function, and the Ethernet data packet is transferred to the underlying logic control part by the DMA transmission mode of the bus master DMA technology. However, when there are Ethernet network data packets in the underlying logic control part that need to be transferred to the PC host computer, the Ethernet network data packets are first uploaded to the driver layer program of the PC host computer by using the DMA transmission mode of the bus master DMA technology. Then the relevant functions in the PCI Express driver based on the DMA transport mode are called to transmit these Ethernet network packets to the RecvPacket function in the upper API function. Finally, the test application directly obtains the Ethernet network data packet from the RecvPacket function. And the analysis is carried out. Then, the hardware platform of the system is built with XC6VLX240TFF1156-1FPGA main chip as the core processing component. The hardware device mainly includes PCI Express X8, peripheral storage device, Ethernet port JTAG and power supply. The connection between each module is introduced in detail. Finally, the software is designed on the platform. The main functions of the software are: the sending of Ethernet data packet, the receiving of Ethernet network data packet and the filtering of Ethernet network data packet. The main functions of the design are as follows: the main functions of the software are: the sending of Ethernet network data packet, the receiving of Ethernet network data packet and the filtering of Ethernet network data packet. In addition, a great deal of optimization test work has been done on the software, which improves the running speed of the program, basically meets the real-time requirement, and obtains the ideal experimental effect.
【學(xué)位授予單位】：江西科技師范大學(xué)
【學(xué)位級(jí)別】：碩士
【學(xué)位授予年份】：2013
【分類號(hào)】：TP334.7;TN791
本文編號(hào)：2255512
[Abstract]:With the development of economy in our country, the requirement of network application is more and more high. The data throughput of ordinary network card can not meet the special application in some special occasions. When the ordinary network card processes a large number of network data packets in a short time, Often happens the phenomenon of packet loss. In this paper, FPGA technology and Ethernet technology are combined, FPGA embedded Ethernet MAC technology is applied to Ethernet, and a high performance network processing card is designed to replace the common network card, which greatly improves the network data throughput. The problem of packet loss is solved thoroughly and the special application of some special occasions is satisfied. Firstly, the paper introduces and explains the commonly used network packet processing technology, and analyzes the domestic and foreign research status and the practical significance of the high performance network processing card. Secondly, the paper analyzes the bus master DMA technology. The main purpose of using the bus master DMA technology is to efficiently transmit the Ethernet data packet from the PC upper computer to the bottom logic control part or the Ethernet network data packet from the underlying logic control part to the PC upper computer. After assembling the Ethernet network data packet in the test application program of the PC upper computer, the SendPacket in the upper API function is first called to send the Ethernet network packet function. Then the related functions in the PCI Express driver based on the DMA transmission mode are called in the SendPacket function, and the Ethernet data packet is transferred to the underlying logic control part by the DMA transmission mode of the bus master DMA technology. However, when there are Ethernet network data packets in the underlying logic control part that need to be transferred to the PC host computer, the Ethernet network data packets are first uploaded to the driver layer program of the PC host computer by using the DMA transmission mode of the bus master DMA technology. Then the relevant functions in the PCI Express driver based on the DMA transport mode are called to transmit these Ethernet network packets to the RecvPacket function in the upper API function. Finally, the test application directly obtains the Ethernet network data packet from the RecvPacket function. And the analysis is carried out. Then, the hardware platform of the system is built with XC6VLX240TFF1156-1FPGA main chip as the core processing component. The hardware device mainly includes PCI Express X8, peripheral storage device, Ethernet port JTAG and power supply. The connection between each module is introduced in detail. Finally, the software is designed on the platform. The main functions of the software are: the sending of Ethernet data packet, the receiving of Ethernet network data packet and the filtering of Ethernet network data packet. The main functions of the design are as follows: the main functions of the software are: the sending of Ethernet network data packet, the receiving of Ethernet network data packet and the filtering of Ethernet network data packet. In addition, a great deal of optimization test work has been done on the software, which improves the running speed of the program, basically meets the real-time requirement, and obtains the ideal experimental effect.
【學(xué)位授予單位】：江西科技師范大學(xué)
【學(xué)位級(jí)別】：碩士
【學(xué)位授予年份】：2013
【分類號(hào)】：TP334.7;TN791
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