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多核處理器的加速比研究與熱設(shè)計(jì)

發(fā)布時(shí)間:2018-09-09 17:55
【摘要】:本世紀(jì)初提升主頻之路走到了拐點(diǎn),多核處理器應(yīng)運(yùn)而生,逐漸成為研究熱點(diǎn)。處理器的重要評(píng)價(jià)指標(biāo)是速度和功耗,如何加快速度降低功耗,成為本文關(guān)注的重點(diǎn)。暫時(shí)條件所限,本工作基于理論計(jì)算展開對(duì)比研究。 本工作主要目標(biāo)有二: 一是基于阿姆達(dá)爾定律,重新計(jì)算多核處理器的加速比,以便分析設(shè)計(jì)速度更快的多核處理器; 二是基于CMOS電路低功耗設(shè)計(jì),研究多核處理器的低功耗設(shè)計(jì)方法,為研究二維/三維多核處理器熱設(shè)計(jì)做鋪墊。 論文的主要內(nèi)容有四: (1)討論已有的并行技術(shù)研究,由計(jì)算時(shí)間來衡量處理速度,就產(chǎn)生了加速比的概念; (2)我們?cè)u(píng)述阿姆達(dá)爾定律給出的評(píng)價(jià)并行計(jì)算機(jī)加速性能的標(biāo)準(zhǔn),然后融合蘭特法則與阿姆達(dá)爾定律,基于第一性原理提出新的加速比描述模型(指數(shù)模型)。 (3)討論對(duì)比對(duì)稱/非對(duì)稱的多核架構(gòu),給出兩種架構(gòu)的時(shí)間開銷描述式,得到更精確的非對(duì)稱架構(gòu)描述式,計(jì)算討論非對(duì)稱架構(gòu)優(yōu)于對(duì)稱架構(gòu)的判斷條件。 (4)分析電路功耗分布和類型,總結(jié)低功耗設(shè)計(jì)的策略和方法,然后討論三種多核處理器的熱設(shè)計(jì)方法:熱通孔技術(shù);電壓島技術(shù);動(dòng)態(tài)熱量管理。 本文主要結(jié)果和結(jié)論有: (1)經(jīng)驗(yàn)證,本文提出的新加速比描述模型(指數(shù)模型Speedup=mαf)可行。 (2)非對(duì)稱多核架構(gòu)在絕大多數(shù)條件下的性能都優(yōu)于對(duì)稱多核架構(gòu)。
[Abstract]:At the beginning of this century, the road of improving the main frequency has reached the inflection point, and the multi-core processor has emerged as the times require, and has gradually become a research hotspot. The important evaluation index of processor is speed and power consumption. How to accelerate speed and reduce power consumption has become the focus of this paper. A comparative study is carried out on the basis of theoretical calculation within the limits of temporary conditions. There are two main objectives of this work: one is to recalculate the speedup of multi-core processors based on Amdal's law, so as to analyze and design faster multi-core processors, and the other is to design low-power CMOS circuits. The low-power design method of multi-core processor is studied in order to pave the way for the study of two-dimensional / three-dimensional multi-core processor thermal design. The main contents of this paper are as follows: (1) the concept of speedup is produced when the speed of processing is measured by computing time. (2) We review the criteria given by Amdal's Law to evaluate the acceleration performance of parallel computers, and then merge Rand's Law with Amdal's Law. Based on the first principle, a new speedup description model (). (3) is proposed to discuss the comparison of symmetric and asymmetric multicore architectures. The time cost descriptions of the two architectures are given, and a more accurate description of asymmetric architectures is obtained. (4) analyze the distribution and type of circuit power consumption, summarize the strategies and methods of low power design, and then discuss three thermal design methods of multi-core processor: hot hole technology; Voltage Island Technology; dynamic Heat Management. The main results and conclusions of this paper are as follows: (1) the new speedup description model (exponential model Speedup=m 偽 f) proposed in this paper is feasible; (2) the performance of asymmetric multicore architecture is superior to that of symmetric multicore architecture under most conditions.
【學(xué)位授予單位】:蘇州大學(xué)
【學(xué)位級(jí)別】:碩士
【學(xué)位授予年份】:2012
【分類號(hào)】:TP332

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