三維垂直型阻變存儲(chǔ)器的特性、機(jī)理及其集成技術(shù)研究
發(fā)布時(shí)間:2018-09-07 15:04
【摘要】:三維(3D)器件集成和多值存儲(chǔ)(MLC)單元是實(shí)現(xiàn)高密度數(shù)據(jù)存儲(chǔ)的兩項(xiàng)極具吸引力的技術(shù)。本文的實(shí)驗(yàn)研究分為兩部分,首先成功制備了三層Ta2O5-x/TaOy/AlOx三維阻變隨機(jī)存儲(chǔ)器(3D RRAM),進(jìn)行了電學(xué)特性的測試,并以溫度影響導(dǎo)電離子運(yùn)動(dòng)的特性為基礎(chǔ),對(duì)三維阻變存儲(chǔ)器器件的阻變機(jī)理進(jìn)行了探究。實(shí)驗(yàn)結(jié)果表明三維器件中分別處于不同阻變層的三個(gè)垂直型器件單元表現(xiàn)出極好的一致性和極高的電學(xué)特性:大于1000倍的高低阻值的窗口,超過1010次循環(huán)的耐久性,在125℃下達(dá)到104s的數(shù)據(jù)保持時(shí)間。同時(shí),四個(gè)組態(tài)的多值存儲(chǔ)操作通過兩種操作方式:控制電流方式(CCS)和控制電壓方式(VCS)得以實(shí)現(xiàn)。其次,單元存儲(chǔ)器制備成功之后,考慮到工業(yè)產(chǎn)品直接應(yīng)用的是存儲(chǔ)器陣列,而陣列密度的提高要受到兩方面的制約:1)水平方向和垂直方向上的器件尺寸限制;2)三維器件中選通管的集成。所以本文在第二部分實(shí)驗(yàn)研究中,提出并成功制備了以碳納米管(CNT)這一維材料作為端電極的新型三維阻變器件。電學(xué)測試表明集成了直徑僅2.5nm的金屬型CNT做電極的阻變器件可實(shí)現(xiàn)變阻現(xiàn)象。尤其,由于金屬Sc和CNT呈近似歐姆接觸,TaOy-CNT-Sc器件的I-V曲線與兩個(gè)均為金屬電極的同類器件近似一致。同時(shí),得益于形成于金屬/CNT和阻變材料/半導(dǎo)體型CNT接觸面的肖特基勢壘所導(dǎo)致的不對(duì)稱載流子運(yùn)動(dòng),利用半導(dǎo)體型CNT作為電極成功制備了不需外加選通管的阻變存儲(chǔ)器,并對(duì)該器件進(jìn)行了電學(xué)特性的測試和機(jī)理探究,研究結(jié)果可直接應(yīng)用于高密度存儲(chǔ)器陣列的制備過程中,解決了困擾阻變存儲(chǔ)器陣列的串?dāng)_問題。
[Abstract]:Three-dimensional (3D) device integration and multi-valued storage (MLC) cells are two attractive techniques for high density data storage. The experimental research in this paper is divided into two parts. Firstly, three layers of Ta2O5-x/TaOy/AlOx three dimensional resistive random access memory (3D RRAM),) have been successfully fabricated to test the electrical properties, which are based on the effect of temperature on the movement of conducting ions. The resistance mechanism of three-dimensional resistive memory device is studied. The experimental results show that the three vertical elements in three dimensional devices with different resistive layers exhibit excellent consistency and extremely high electrical properties: windows with high and low resistance values greater than 1000 times, durability of more than 1010 cycles. The data retention time reached 104 s at 125 鈩,
本文編號(hào):2228608
[Abstract]:Three-dimensional (3D) device integration and multi-valued storage (MLC) cells are two attractive techniques for high density data storage. The experimental research in this paper is divided into two parts. Firstly, three layers of Ta2O5-x/TaOy/AlOx three dimensional resistive random access memory (3D RRAM),) have been successfully fabricated to test the electrical properties, which are based on the effect of temperature on the movement of conducting ions. The resistance mechanism of three-dimensional resistive memory device is studied. The experimental results show that the three vertical elements in three dimensional devices with different resistive layers exhibit excellent consistency and extremely high electrical properties: windows with high and low resistance values greater than 1000 times, durability of more than 1010 cycles. The data retention time reached 104 s at 125 鈩,
本文編號(hào):2228608
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