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基于MLC NVM的寫能耗優(yōu)化策略研究與設計

發(fā)布時間:2018-07-11 16:57

  本文選題:非易失性存儲器 + NVM ; 參考:《山東大學》2017年碩士論文


【摘要】:隨著集成電路集成度的不斷增加、工藝尺寸的不斷微縮,靜態(tài)功耗已經(jīng)成為制約CMOS存儲器技術發(fā)展的主要瓶頸。這一問題在動態(tài)隨機存儲器(DRAM)以及靜態(tài)隨機存儲器(SRAM)上都十分突出。DRAM需要刷新操作來保持數(shù)據(jù),所以其靜態(tài)功耗占到整個DRAM功耗的40%以上。對于SRAM存儲單元,如果想將數(shù)據(jù)持續(xù)保存在存儲單元內(nèi),就需要持續(xù)對存儲單元供電。非易失性存儲器(NVM),是其中一種作為解決傳統(tǒng)存儲技術所遇到的技術瓶頸而研究的新型存儲技術,它的主要特點就是斷電后數(shù)據(jù)依然可以保存在存儲單元內(nèi)。主流的非易失存儲技術有相變存儲器(PCM)和自旋轉(zhuǎn)移矩磁存儲器(STT-MRAM)等,它們具有高存儲密度,高可靠性,非易失性等特點。而且PCM有著與DRAM相近的存取延遲,其在未來有可能代替DRAM成為主存儲器;STT-MRAM有著略高于SRAM的存取延遲,近年來針對STT-MRAM的各項研究主要集中在其作為片上末級緩存的研究。多級單元(MLC)就是在一個單元格中存儲一個以上的bit,一般指存儲兩個。相較單級單元(SLC),MLC可以有更高的存儲密度。MLCNVM與SLC NVM在物理結構上并無本質(zhì)區(qū)別,同樣也幾乎沒有靜態(tài)能耗,但是,卻有著更高的動態(tài)能耗。本文針對MLC NVM動態(tài)寫能耗過高的問題進行的優(yōu)化。對于MLC PCM以及MLC STT-MRAM,翻轉(zhuǎn)左位的平均能耗要比不翻轉(zhuǎn)左位的平均能耗高很多,另外,寫中間狀態(tài)'01'與'10'的平均能耗要高于寫'00'與'11'的平均能耗。本文在已有的編碼策略——狀態(tài)重映射策略的基礎上,進一步針對MLC PCM以及MLC STT-MRAM在寫能耗方面的特性,對每次寫入存儲器中的數(shù)據(jù)進行分析,改進獲得狀態(tài)重映射方式的算法,從而獲得更優(yōu)的能耗優(yōu)化結果。該策略通過統(tǒng)計每種狀態(tài)轉(zhuǎn)換的數(shù)量,并對每種狀態(tài)轉(zhuǎn)換賦予能耗權值,計算不同的狀態(tài)重映射后數(shù)據(jù)的寫入能耗與原始數(shù)據(jù)的寫入能耗之間的差距,從中選取出能耗最優(yōu)的重映射方式。通過試驗對比,我們發(fā)現(xiàn),在MLCPCM的能耗模型下,本文策略相較基準寫策略可以減少平均約6.17%的寫能耗,在MLCSTT-MRAM能耗模型下,可以減少平均約12.17%的寫能耗。
[Abstract]:With the increasing integration of integrated circuits and the continuous shrinking of process size, static power consumption has become the main bottleneck restricting the development of CMOS memory technology. This problem is very prominent in both dynamic random access memory (DRAM) and static random access memory (SRAM). DRAM requires refresh operations to maintain data, so its static power consumption accounts for more than 40% of the total DRAM power consumption. For SRAM storage cells, if you want to keep the data in the memory cell, you need to continuously supply power to the memory cell. Non-volatile memory (NVM) is one of the new storage technologies which is studied as a solution to the bottleneck of traditional storage technology. Its main feature is that the data can still be stored in the memory cell after power off. The main non-volatile memory technologies include phase change memory (PCM) and spin transfer moment magnetic memory (STT-MRAM), which have the characteristics of high storage density, high reliability and non-volatile. PCM has the same access delay as DRAM, and it may replace DRAM as the main memory in the future, STT-MRAM has a slightly higher access delay than SRAM. In recent years, the research of STT-MRAM is mainly focused on the research of STT-MRAM as the last stage buffer on the chip. Multilevel cells (MLC) store more than one bit in a cell. Compared with single stage cell (SLC) MLC can have higher storage density. MLCNVM and SLC NVM have no essential difference in physical structure and almost no static energy consumption. However, it has higher dynamic energy consumption. This paper focuses on the optimization of MLC NVM with high dynamic write energy consumption. For MLC PCM and MLC STT-MRAM, the average energy consumption of flipping left position is much higher than that of not flipping left position. In addition, the average energy consumption of writing intermediate states 0 'and 10' is higher than that of writing 0 'and 1'. Based on the existing coding strategy-state remapping strategy, this paper analyzes the data in every write memory according to the characteristics of MLC PCM and MLC STT-MRAM in write energy consumption, and improves the algorithm to obtain the state remapping method. Thus, a better result of energy consumption optimization is obtained. The strategy calculates the difference between the energy consumption of the data after different state remapping and the energy consumption of the original data by counting the number of each state transition and assigning the energy consumption weight to each state transition. The optimal remapping method of energy consumption is selected. Through experimental comparison, we find that under the MLCPCM energy consumption model, the average write energy consumption can be reduced by about 6.17% compared with the reference writing strategy, and the average write energy consumption can be reduced by about 12.17% under the MLCSTT-MRAM energy consumption model.
【學位授予單位】:山東大學
【學位級別】:碩士
【學位授予年份】:2017
【分類號】:TP333

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相關碩士學位論文 前1條

1 臧祥騰;基于MLC NVM的寫能耗優(yōu)化策略研究與設計[D];山東大學;2017年

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本文編號:2115952

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