本文選題：AMD + APU��； 參考：《復(fù)旦大學(xué)》2012年碩士論文

【摘要】：本文是針對AMD的新一代APU(將GPU集成進(jìn)CPU)進(jìn)行桌面應(yīng)用平臺設(shè)計,所使用的APU是Trinity家族FM2系列。應(yīng)用平臺命名為Annapurna,是一款典型的ATX桌面機(jī)系統(tǒng)平臺,其上使用的FCH,傳統(tǒng)名稱為“南橋”,名為HudsonD4版本為A12。作為一個工程項目,從最初的計劃,市場需求反饋,然后產(chǎn)品定義,設(shè)計規(guī)范,到原理圖實現(xiàn),Layout實現(xiàn),再到工板的單板調(diào)試及Debug,測試、驗證。當(dāng)然最終目的是推廣到市場,完成一個完整的項目。 本文的主要工作是原理圖實現(xiàn),單板調(diào)試／測試,解BUG。原理圖方面主要涉及：選取CHIL8338和CHIL8115電源芯片作為APU電源模塊；采用了Intersil的ISL6539DC/DC轉(zhuǎn)換器解決了Memory供電問題；選用ANPEC的APL5920KA線性穩(wěn)壓源作為FCH核心電源1.1V的解決方案；用TI的SN75DP126芯片解決DP和HDMI顯示輸出切換的問題；用肖特基管解決接口的ESD保護(hù)問題；網(wǎng)絡(luò)和音頻部分主要解決了數(shù)�；旌显O(shè)計中的重點(diǎn)-數(shù)模分離問題等。單板調(diào)試及解BUG主要涉及：根據(jù)電容充放電原理,降低濾波電容容值可以減小上升時間,所以更改電容設(shè)計值來解決RSMRST#時序異常BUG；更改Layout設(shè)計解決了ESATA功能異常BUG等。測試部分主要涉及基本功能測試和GPU性能測試,同時驗證平臺設(shè)計和APU性能。 本文在設(shè)計時提出供電部分合“多”為一的方案來解決GPU和CPU合二而一(APU)所帶來的電源部分的變化,既要給CPU部分供電,又要給GPU部分供電,所以選用CHIL8338PWM控制器配合門驅(qū)動器和MOSFET組來分別輸出6組電源來提供電壓和電流,同時由于該集成芯片支持AMD SIV2技術(shù),便于APU集中控制來滿足上電時序。在顯示部分,設(shè)計時將不同接口連接到APU的3個專用的顯示控制器來解決支持AMD的多顯示器技術(shù)以及不同標(biāo)準(zhǔn)接口VGA,DVI和DP/HDMI的問題,并使用TI的SN75DP126芯片方案來解決DP/HDMI熱插拔時的切換問題。 目前為止,Annapurna平臺在Validation過程中共發(fā)現(xiàn)并解決1096個BUG,PCB已經(jīng)更新到第四版,整體平臺更是高達(dá)第26版。設(shè)計方案被華碩,微星和聯(lián)想所采用,預(yù)計在6月份推出各品牌的主板。同時驗證了Trinity FM2Silicon的功能和性能,改版多次,從AOA, AOB到BOA/B, COA/B/C,現(xiàn)在版本為D0,即將推向終端市場。
[Abstract]:This paper designs a desktop application platform for AMD's new generation APU (integrating GPU into CPU). The APU used is Trinity family FM2 series. Named Annapurna, the application platform is a typical ATX desktop system platform, on which the traditional name is "South Bridge" and the Hudson D 4 version is A12. As an engineering project, from initial planning, market demand feedback, then product definition, design specification, schematic implementation to layout implementation, then to panel debugging and Debug, testing, validation. Of course, the ultimate goal is to market, complete a complete project. The main work of this paper is schematic implementation, single board debugging / testing, solution Bug. The schematic diagram mainly involves: selecting CHIL8338 and CHIL8115 power chip as APU power module, adopting Intersil ISL6539 DC / DC converter to solve memory power supply problem, choosing ANPEC APL5920KA linear stabilized voltage source as the solution of FCH core power supply 1.1 V, using ISL6539 DC / DC converter of Intersil to solve the problem of memory power supply, and selecting ANPEC APL5920KA linear stabilized voltage source as the solution of FCH core power supply. Using TI's SN75DP126 chip to solve the problem of DP and HDMI display output switching, using Schottky transistor to solve the ESD protection problem of interface, the network and audio part mainly solve the problem of digital-analog separation in the mixed design of digital and analog. According to the principle of capacitive charge and discharge, reducing the capacitance value of filter can reduce the rise time, so changing the design value of capacitance to solve the abnormal time sequence bug of RSMRST#, changing layout design to solve the ESATA functional abnormal bug and so on. The testing part mainly involves basic function test and GPU performance test, and also verifies platform design and APU performance. In this paper, the scheme of "more" power supply is put forward to solve the change of power supply caused by the combination of GPU and CPU (APU), which not only supplies power to CPU part, but also provides power supply to GPU part. Therefore, CHIL8338PWM controller is selected to supply voltage and current with gate driver and MOSFET respectively, and the integrated chip supports AMD SIV2 technology, which is convenient for APU centralized control to meet the power sequence. In the display part, three special display controllers are designed to connect different interfaces to APU to solve the problems of supporting AMD's multi-display technology and different standard interfaces, such as VGADVI and DPP-HDMI. TI's SN75 DP126 chip scheme is used to solve the switching problem of DP- / HDMI hot-plug. So far, the Annapurna platform has found and resolved a total of 1096 buggie PCBs in the validation process, and the overall platform is up to version 26. The design, adopted by Asus, Microstar and Lenovo, is expected to launch its brand motherboards in June. At the same time, the function and performance of Trinity FM2Silicon have been verified, which has been revised many times, from AOAA, AOB to BOAP B, COA / R / B / C, now D0, and is about to be introduced to the terminal market.
【學(xué)位授予單位】：復(fù)旦大學(xué)
【學(xué)位級別】：碩士
【學(xué)位授予年份】：2012
【分類號】：TP368.1

【參考文獻(xiàn)】

相關(guān)期刊論文 前1條

1 張榮君;蔣曉軍;賈巖;陸起涌;;工程碩士研究生培養(yǎng)經(jīng)驗及相關(guān)問題探討[J];項目管理技術(shù);2009年04期

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本文編號：2110946