基于DM3730異構(gòu)多核處理器的嵌入式操作系統(tǒng)設(shè)計與實現(xiàn)
發(fā)布時間:2018-06-25 09:06
本文選題:異構(gòu) + 多核。 參考:《電子科技大學(xué)》2013年碩士論文
【摘要】:計算機(jī)處理器正在向著多核甚至眾核的方向發(fā)展。同一塊芯片中集成了越來越多的處理核心。而且集成了多個異構(gòu)核心的處理器也在不斷涌現(xiàn)。多核技術(shù)發(fā)展趨勢下,作為基礎(chǔ)軟件平臺的操作系統(tǒng)卻還并未完全適配,尤其是對于異構(gòu)多核處理器的支持還十分欠缺。 本論文正是著眼于上述問題,在TI DM3730這一款SoC芯片上設(shè)計實現(xiàn)了能支持ARM核與DSP核這兩種異構(gòu)處理核心協(xié)同工作的系統(tǒng)軟件平臺。 本文主要工作內(nèi)容為: 1.研究在ARM核與DSP核上的操作系統(tǒng)架構(gòu),設(shè)計實現(xiàn)了在ARM核上運行Linux,在DSP核上移植實驗室自主開發(fā)的RTOS aCoral操作系統(tǒng)的架構(gòu)。系統(tǒng)啟動從ARM端的Linux開始,進(jìn)而由Linux加載操作系統(tǒng)鏡像到DSP核上并運行DSP上的aCoral。 2.研究ARM核與DSP核間的同步與通信機(jī)制。通過ARM/DSP核向DSP/ARM核發(fā)出中斷請求的方式,實現(xiàn)異構(gòu)核間的信號傳遞,并在這一基礎(chǔ)之上,實現(xiàn)異構(gòu)核間的任務(wù)調(diào)用機(jī)制。再使用共享內(nèi)存的方式,在這兩個異構(gòu)核上的系統(tǒng)間進(jìn)行數(shù)據(jù)傳遞。 3.研究基于上述異構(gòu)多核系統(tǒng)平臺上的應(yīng)用軟件開發(fā)模式。在ARM端設(shè)計了供應(yīng)用程序調(diào)用DSP核的機(jī)制,,在DSP端設(shè)計了根據(jù)ARM端的請求執(zhí)行用戶程序的機(jī)制。 以上工作為在異構(gòu)多核上實現(xiàn)系統(tǒng)軟件有效運行提供了參考,向最終實現(xiàn)應(yīng)用程序的并行協(xié)同運行、透明開發(fā)的目標(biāo)邁出了堅實的一步。
[Abstract]:Computer processors are moving towards multi-core or even multi-core. More and more processing cores are integrated into the same chip. And processors that integrate multiple heterogeneous cores are emerging. With the development of multi-core technology, the operating system, as the basic software platform, has not been fully adapted, especially for heterogeneous multi-core processors. Aiming at the above problems, this paper designs and implements a system software platform on TI DM3730, a SoC chip, which can support the cooperation of arm core and DSP core. The main work of this paper is as follows: 1. The operating system architecture on arm core and DSP core is studied. The architecture of running Linux on arm core and transplanting RTOS a Coral operating system developed by lab on DSP core is designed and implemented. The system starts with arm Linux, and then Linux loads the operating system image onto the DSP core and runs aCoral.2 on DSP. The synchronization and communication mechanism between arm and DSP is studied. The interrupt request is sent to DSP / arm by ARM / DSP core to realize the signal transfer between heterogeneous cores, and on this basis, the task transfer mechanism between heterogeneous cores is realized. Then use shared memory to transfer data between the two heterogeneous cores. 3. 3. The application software development model based on the above heterogeneous multi-core system platform is studied. The mechanism for the application program to call DSP core is designed on the arm side, and the mechanism for executing the user program according to the request of the arm side is designed on the DSP side. The above work provides a reference for the effective operation of the system software on heterogeneous multi-core, and takes a solid step towards the goal of realizing the parallel and cooperative running and transparent development of the application program.
【學(xué)位授予單位】:電子科技大學(xué)
【學(xué)位級別】:碩士
【學(xué)位授予年份】:2013
【分類號】:TP332;TP368.1
【參考文獻(xiàn)】
相關(guān)碩士學(xué)位論文 前2條
1 申建晶;嵌入式多核實時操作系統(tǒng)研究及實現(xiàn)[D];電子科技大學(xué);2011年
2 顧寶剛;基于VxWorks的異構(gòu)多核處理器軟件系統(tǒng)的研究與設(shè)計[D];國防科學(xué)技術(shù)大學(xué);2008年
本文編號:2065400
本文鏈接:http://sikaile.net/kejilunwen/jisuanjikexuelunwen/2065400.html
最近更新
教材專著