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基于同時多線程的取指控制機制研究

發(fā)布時間:2018-06-18 06:25

  本文選題:同時多線程處理器 + 取指控制機制 ; 參考:《哈爾濱工程大學(xué)》2012年碩士論文


【摘要】:隨著計算機體系結(jié)構(gòu)的發(fā)展,為順應(yīng)人們對高性能處理器的迫切需求,同時多線程處理器應(yīng)運而生,成為目前主流的微處理器結(jié)構(gòu)。針對同時多線程處理器的各項研究變得十分活躍,同時多線程處理器的取指控制機制作為高性能處理器領(lǐng)域的研究熱點備受關(guān)注。近年來,國內(nèi)外許多專家學(xué)者和科研機構(gòu)對其展開積極的研究和探索。但是,目前同時多線程處理器的取指控制技術(shù)仍存在取指帶寬利用不均衡、指令隊列沖突率高和分支預(yù)測性能低下等缺陷。因此,本文將針對同時多線程處理器的取指控制技術(shù)展開研究,以尋求高效合理的取指控制機制。 本文首先從取指策略和分支預(yù)測器兩個方面對取指控制機制進(jìn)行研究,并分別提出一種基于同時多線程的取指策略和分支預(yù)測器。與傳統(tǒng)的取指策略相比,本策略的技術(shù)優(yōu)勢:處理器的取指過程分為線程選擇、取指帶寬劃分和動態(tài)資源分配三個階段,通過計算線程運行所需的指令數(shù),給予適量的取指帶寬,使得取指帶寬的利用更為均衡。同時,根據(jù)線程的優(yōu)先級動態(tài)分配系統(tǒng)資源,提高了系統(tǒng)資源的利用率。在新型取指策略研究的基礎(chǔ)上,設(shè)計與之相對應(yīng)的分支預(yù)測器,通過將線程的全局和局部歷史信息相結(jié)合作為分支預(yù)測信息位,有效地克服了傳統(tǒng)機制中分支預(yù)測信息混亂、不完整等現(xiàn)象的發(fā)生。同時,通過新增分支結(jié)果輸出表BRT記錄常見分支指令的預(yù)測結(jié)果,推進(jìn)了指令的分支預(yù)測執(zhí)行速度。通過綜合這兩項研究成果,提出一種基于同時多線程的取指控制機制,有效地提高了處理器的指令吞吐率和分支預(yù)測性能。 最后,通過設(shè)計合理的性能測試方案,對其進(jìn)行性能測試和結(jié)果分析。性能測試結(jié)果表明:新型的取指控制機制有效地克服了傳統(tǒng)機制中存在的取指策略不夠優(yōu)化、分支預(yù)測性能低下等缺點,極大地促進(jìn)處理器整體性能的提升,具有良好的應(yīng)用前景和研究價值。
[Abstract]:With the development of computer architecture, in order to meet the urgent needs of high performance processors, multithread processors emerge as the times require, and become the mainstream microprocessor architecture. The research on simultaneous multithreading processor has become very active, and the control mechanism of multi-threaded processor as the research hotspot in the field of high-performance processors. In recent years, many domestic and foreign experts and scholars and scientific research institutions to carry out active research and exploration. However, at present, there are still some shortcomings in the simultaneous multithread processor, such as unbalanced utilization of the wideband, high collision rate of instruction queue and low branch prediction performance. Therefore, this paper will focus on the simultaneous multithreaded processor to research the technology of finger extraction control, in order to find an efficient and reasonable control mechanism. In this paper, we first study the control mechanism of finger extraction from two aspects: the strategy of finger extraction and the branch predictor, and propose a new strategy and a branch predictor based on simultaneous multithreading respectively. Compared with the traditional strategy, the technology advantage of this strategy is as follows: the process of the processor is divided into three stages: thread selection, bandwidth partition and dynamic resource allocation, and the number of instructions needed for thread operation is calculated. Give the appropriate amount of finger-taking bandwidth, so that the use of finger-taking bandwidth more balanced. At the same time, the system resource is dynamically allocated according to the priority of thread, and the utilization rate of system resource is improved. A branch predictor is designed based on the research of the new strategy of finger extraction. By combining the global and local historical information of thread as the bit of branch prediction information, the confusion of branch prediction information in the traditional mechanism is effectively overcome. The occurrence of incomplete phenomena. At the same time, the new branch result output table (BRT) records the prediction results of common branch instructions, which promotes the execution speed of branch prediction. By synthesizing these two research results, a new control mechanism based on simultaneous multithreading is proposed, which can effectively improve the instruction throughput and branch prediction performance of the processor. Finally, through the design of a reasonable performance test scheme, the performance test and results analysis. The performance test results show that the new control mechanism overcomes the shortcomings of the traditional mechanism, such as poor performance of branch prediction and poor performance of branch prediction, which can greatly improve the overall performance of the processor. It has good application prospect and research value.
【學(xué)位授予單位】:哈爾濱工程大學(xué)
【學(xué)位級別】:碩士
【學(xué)位授予年份】:2012
【分類號】:TP332

【參考文獻(xiàn)】

相關(guān)期刊論文 前10條

1 孫彩霞;張民選;;基于多個取指優(yōu)先級的同時多線程處理器取指策略[J];電子學(xué)報;2006年05期

2 孫彩霞;張民選;;公平運行同時多線程處理器中的線程[J];電子學(xué)報;2008年02期

3 任建;安虹;路放;梁博;;同時多線程處理器上的動態(tài)分支預(yù)測器設(shè)計方案研究[J];計算機科學(xué);2006年03期

4 王晶;樊曉椏;葉曾;;一種基于綜合歷史信息的SMT結(jié)構(gòu)分支預(yù)測算法[J];計算機科學(xué);2008年02期

5 賈小敏;孫彩霞;張民選;;基于EPIC的同時多線程處理器取指策略[J];計算機工程;2007年04期

6 何立強;劉志勇;;一種有效的同時多線程處理器取指控制機制[J];計算機學(xué)報;2006年04期

7 孫彩霞;張民選;;使用取指策略控制同時多線程處理器中個體線程的性能[J];計算機學(xué)報;2008年02期

8 焦永,陳躍躍;復(fù)合分支預(yù)測中選擇算法的研究[J];計算機應(yīng)用研究;2005年04期

9 劉權(quán)勝;楊洪斌;吳悅;;同時多線程技術(shù)[J];計算機工程與設(shè)計;2008年04期

10 蘇銘,趙榮彩,宋宗宇;安騰處理器中多級分支預(yù)測機制[J];微計算機信息;2005年21期

相關(guān)博士學(xué)位論文 前1條

1 何立強;同時多線程處理器前端系統(tǒng)的研究[D];中國科學(xué)院研究生院(計算技術(shù)研究所);2004年

相關(guān)碩士學(xué)位論文 前2條

1 趙新;基于遺傳神經(jīng)網(wǎng)絡(luò)的MG時間序列預(yù)測方法研究[D];武漢科技大學(xué);2006年

2 何濤;GCC編譯器中間代碼層控制流檢測擴充研究[D];國防科學(xué)技術(shù)大學(xué);2010年

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