本文選題：異構(gòu)多核處理器 + 靜態(tài)任務(wù)調(diào)度��； 參考：《哈爾濱工程大學(xué)》2012年碩士論文

【摘要】：從單核處理器時(shí)代開始，任務(wù)調(diào)度的研究就倍受眾多專家、學(xué)者的關(guān)注，任務(wù)調(diào)度的結(jié)果直接影響操作系統(tǒng)的性能，系統(tǒng)性能的提升不僅要依靠自身的硬件水平，，還取決于加載在硬件之上的軟件。隨著多核處理器的出現(xiàn)，專家、學(xué)者將目光投向多核處理器上的任務(wù)調(diào)度，目前多核處理器上的任務(wù)調(diào)度已經(jīng)成為高性能處理器研究熱點(diǎn)之一。為了迎合處理器未來(lái)的發(fā)展趨勢(shì)，本文旨在研究異構(gòu)多核處理器上的任務(wù)調(diào)度，其目的在于尋找一種較理想的靜態(tài)任務(wù)調(diào)度策略，使運(yùn)行在異構(gòu)多核處理器上的任務(wù)能得到合理的調(diào)度，縮短任務(wù)調(diào)度的總長(zhǎng)度、提升多核處理器的執(zhí)行效率。 本文在對(duì)四種經(jīng)典異構(gòu)多核處理器任務(wù)調(diào)度算法分析和研究的基礎(chǔ)上，針對(duì)現(xiàn)存高效任務(wù)調(diào)度算法存在的不足，提出一種基于加權(quán)優(yōu)先級(jí)的靜態(tài)任務(wù)調(diào)度策略，并設(shè)計(jì)了基于該策略的任務(wù)調(diào)度算法。本策略通過任務(wù)合并、任務(wù)分層和任務(wù)權(quán)值計(jì)算三個(gè)過程順序執(zhí)行來(lái)實(shí)現(xiàn)任務(wù)優(yōu)先級(jí)計(jì)算階段，然后通過任務(wù)任務(wù)分配到處理器和任務(wù)調(diào)度結(jié)果優(yōu)化兩個(gè)過程交替執(zhí)行來(lái)實(shí)現(xiàn)任務(wù)映射到處理器階段。新策略保證任務(wù)按層次順序執(zhí)行，并優(yōu)先調(diào)度每一層的關(guān)鍵任務(wù)，盡量縮短關(guān)鍵路徑的長(zhǎng)度以減少總的任務(wù)完成時(shí)間。在調(diào)度過程中采用任務(wù)復(fù)制技術(shù)，以任務(wù)的冗余執(zhí)行來(lái)提前后繼任務(wù)的最早開始時(shí)間，并及時(shí)對(duì)冗余任務(wù)進(jìn)行刪除處理，縮短任務(wù)調(diào)度時(shí)間，提高多核處理器的并行性。 為了驗(yàn)證基于加權(quán)優(yōu)先級(jí)的任務(wù)調(diào)度策略的高效性和可行性，本文對(duì)提出的算法采用實(shí)驗(yàn)的方法進(jìn)行驗(yàn)證，實(shí)驗(yàn)平臺(tái)選用高性能的Simics模擬器，使用Simics模擬多核處理器的基本結(jié)構(gòu)，并將新策略轉(zhuǎn)化成具體的算法加載在模擬器上運(yùn)行。實(shí)驗(yàn)結(jié)果表明：與以往的算法相比，新的算法繼承了它們保證關(guān)鍵任務(wù)優(yōu)先運(yùn)行的優(yōu)點(diǎn)，改善了優(yōu)先級(jí)選擇不當(dāng)、冗余任務(wù)處理過晚的缺點(diǎn)，在任務(wù)調(diào)度過程中提高了處理器的并行性、減少了總的任務(wù)調(diào)度長(zhǎng)度，達(dá)到算法改進(jìn)的預(yù)期效果，具有一定的實(shí)際應(yīng)用價(jià)值。
[Abstract]:Since the era of single core processor, the research of task scheduling has attracted the attention of many experts and scholars. The results of task scheduling directly affect the performance of the operating system, and the improvement of system performance depends not only on its own hardware level, but also on its own hardware level. It also depends on the software that is loaded on the hardware. With the emergence of multi-core processors, experts and scholars focus on task scheduling on multi-core processors. Task scheduling on multi-core processors has become one of the research hot spots in high-performance processors. In order to meet the future development trend of processors, this paper aims to study task scheduling on heterogeneous multi-core processors, which aims to find an ideal static task scheduling strategy. The tasks running on heterogeneous multi-core processors can be reasonably scheduled, the total length of task scheduling can be shortened, and the execution efficiency of multi-core processors can be improved. Based on the analysis and research of four classic heterogeneous multi-core processor task scheduling algorithms, this paper proposes a static task scheduling strategy based on weighted priority, aiming at the shortcomings of the existing efficient task scheduling algorithms. A task scheduling algorithm based on this strategy is designed. This strategy implements the task priority calculation phase by three sequential execution processes: task merging, task stratification and task weight calculation. Then the task mapping to processor phase is realized by alternate execution of task assignment to processor and task scheduling result optimization. The new strategy ensures that tasks are executed in hierarchical order, and prioritizes the scheduling of critical tasks in each layer, and minimizes the length of critical paths to reduce the total task completion time. In the process of scheduling, the task replication technology is adopted to advance the earliest start time of the subsequent task by redundant execution of the task, and to delete the redundant task in time to shorten the task scheduling time and improve the parallelism of the multi-core processor. In order to verify the efficiency and feasibility of the task scheduling strategy based on weighted priority, this paper uses the experimental method to verify the proposed algorithm. The experiment platform uses a high-performance Simics simulator. Simics is used to simulate the basic structure of multi-core processor, and the new strategy is transformed into concrete algorithm to load and run on the simulator. The experimental results show that compared with the previous algorithms, the new algorithm inherits the advantages of ensuring the priority of critical tasks, and improves the disadvantages of improper priority selection and late processing of redundant tasks. In the process of task scheduling, the parallelism of the processor is improved, the total task scheduling length is reduced, and the expected effect of the improved algorithm is achieved, which has certain practical application value.
【學(xué)位授予單位】：哈爾濱工程大學(xué)
【學(xué)位級(jí)別】：碩士
【學(xué)位授予年份】：2012
【分類號(hào)】：TP332

【引證文獻(xiàn)】

相關(guān)期刊論文 前2條

1 李東生;李龍;王驍;高楊;;基于多核系統(tǒng)NoC架構(gòu)的靜態(tài)列表調(diào)度算法[J];計(jì)算機(jī)應(yīng)用研究;2016年04期

2 劉林東;劉波;;一種多核處理器調(diào)度策略研究[J];廣東第二師范學(xué)院學(xué)報(bào);2014年05期

相關(guān)碩士學(xué)位論文 前6條

1 佟彤;多核系統(tǒng)的實(shí)時(shí)任務(wù)調(diào)度問題研究[D];沈陽(yáng)工業(yè)大學(xué);2016年

2 葉佳;基于物聯(lián)網(wǎng)應(yīng)用層的任務(wù)調(diào)度方法研究[D];安徽工程大學(xué);2015年

3 陳龍娟;異構(gòu)多核系統(tǒng)低功耗算法研究[D];哈爾濱理工大學(xué);2015年

4 石祥龍;基于異構(gòu)多核處理器的靜態(tài)任務(wù)調(diào)度算法研究[D];南京郵電大學(xué);2015年

5 鄧宇羽;多靶位自動(dòng)報(bào)靶管理系統(tǒng)的設(shè)計(jì)與實(shí)現(xiàn)[D];重慶大學(xué);2014年

6 張博;基于改進(jìn)粒子群的異構(gòu)CMP依賴任務(wù)調(diào)度研究[D];哈爾濱工程大學(xué);2013年

本文編號(hào)：1954717