本文選題：閃存 + 靈敏放大器��； 參考：《復(fù)旦大學》2012年碩士論文

【摘要】：閃存是高端消費類電子產(chǎn)品必備的器件之一,廣泛應(yīng)用在個人電腦、手機、數(shù)碼相機等產(chǎn)品中。隨著閃存讀寫頻率的不斷提高,以及閃存單元特征尺寸的不斷減小,閃存的穩(wěn)定性,以及能否突破速度瓶頸從而提高性能面臨著巨大的挑戰(zhàn)。除了開發(fā)更先進的工藝制程和先進的存儲單元外,閃存關(guān)鍵電路的設(shè)計成為能否突破速度瓶頸的關(guān)鍵。 本文結(jié)合項目的工程實際問題,在闡述閃存單元結(jié)構(gòu)和工作原理的基礎(chǔ)上,基于當今主流的閃存芯片架構(gòu),通過優(yōu)化對閃存性能具有至關(guān)重要影響的關(guān)鍵外圍電路模塊,包括靈敏放大器,電荷泵系統(tǒng),以及帶隙基準源,從而實現(xiàn)閃存系統(tǒng)的高速低功耗設(shè)計。 核心電路模塊的靈敏放大器設(shè)計中我們采用了多相位預(yù)充技術(shù)和新型鉗位電路來提高閃存讀取速度；電荷泵系統(tǒng)中采用漏電探測模塊來實現(xiàn)閃存的高速低功耗設(shè)計；采用了雙帶隙基準源的設(shè)計以實現(xiàn)參考源的高速和低功耗要求。 本項目基于宏力半導(dǎo)體制造工藝設(shè)計了一個64Mb的NOR型Flash芯片。各關(guān)鍵模塊均通過Hspice前仿和后仿,達到了設(shè)計要求。
[Abstract]:Flash memory is one of the necessary devices in high-end consumer electronics. It is widely used in personal computers, mobile phones, digital cameras and other products. With the increasing of the read and write frequency of flash memory and the decreasing of feature size of flash memory, the stability of flash memory and whether it can break through the speed bottleneck and improve the performance are facing great challenges. In addition to the development of more advanced processes and advanced memory cells, flash memory key circuit design becomes the key to breaking through the speed bottleneck. In this paper, on the basis of expatiating the structure and working principle of flash memory unit, based on the current mainstream architecture of flash memory chip, we optimize the key peripheral circuit modules which have an important impact on the performance of flash memory. It includes sensitive amplifier, charge pump system and bandgap reference source to achieve high speed and low power design of flash memory system. In the design of sensitive amplifier of core circuit module, we adopt multi-phase precharge technology and new clamp circuit to improve the reading speed of flash memory, and the leakage detection module is used to realize the design of high speed and low power consumption of flash memory in charge pump system. A dual band gap reference source is designed to meet the high speed and low power requirements of the reference source. In this project, a 64Mb NOR Flash chip is designed based on the macro-force semiconductor manufacturing process. All the key modules have reached the design requirements through Hspice pre-and post-simulation.
【學位授予單位】：復(fù)旦大學
【學位級別】：碩士
【學位授予年份】：2012
【分類號】：TP333

【參考文獻】

相關(guān)碩士學位論文 前2條

1 王強;Flash Memory中靈敏放大器的設(shè)計[D];合肥工業(yè)大學;2004年

2 楚薇;低壓CMOS電荷泵的設(shè)計及應(yīng)用[D];合肥工業(yè)大學;2004年

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本文編號：1892038