本文選題：嵌入式存儲器　切入點：SoC　出處：《復(fù)旦大學(xué)》2012年碩士論文

【摘要】：隨著邏輯工藝的發(fā)展,SOC得到了廣泛的發(fā)展和應(yīng)用。作為SOC最重要的組成部分嵌入式存儲器,在SOC中所占的比重越來越大,一直是人們研究的重點。嵌入式存儲器是按照功能劃分主要分為揮發(fā)存儲器和非揮發(fā)存儲器。 揮發(fā)存儲器SRAM由于其讀寫速度的優(yōu)勢,應(yīng)用在計算機(jī)高速緩存等高速部件中。65nm及其以下工藝,工藝波動對SRAM性能的影響日益增大。SRAM的讀寫指標(biāo)能夠反映SRAM性能的波動情況,是SRAM性能的關(guān)鍵參數(shù)。論文通過電路設(shè)計的方式得到SRAM讀寫指標(biāo)。分別設(shè)計基于SRAM存儲結(jié)點引出的測試結(jié)構(gòu)和不引出存儲結(jié)點的大陣列SRAM讀寫指標(biāo)測試結(jié)構(gòu)得到65nm下SRAM的讀寫指標(biāo),預(yù)測65nm SRAM陣列的良率,反映出65nm工藝波動對SRAM性能的影響,并在SMIC65nm上流片驗證。 由于EEPROM、Flash、antifuse等傳統(tǒng)非易失存儲器與標(biāo)準(zhǔn)邏輯工藝兼容性較差,不能很好的跟隨工藝技術(shù)帶縮小,在FPGA中應(yīng)用受到了限制。新型非揮發(fā)存儲器RRAM由于非揮發(fā),體積小,與標(biāo)準(zhǔn)的CMOS邏輯工藝兼容,功耗小等優(yōu)點得到了廣泛的關(guān)注。新型存儲器RRAM可以代替?zhèn)鹘y(tǒng)的非揮發(fā)存儲器應(yīng)用在FPGA:一是直接代PROM、EEPROM、閃存Flash等非揮發(fā)存儲器,在上電的時候配置FPGA中揮發(fā)存儲器SRAM。論文提出了一種單芯片結(jié)構(gòu)中非揮發(fā)存儲器RRAM和揮發(fā)存儲器SRAM之間的通信方式,分析了通信電路。二是直接代替反熔絲Antifuse等編程結(jié)點,成為FPGA中開關(guān)編程結(jié)點。論文中通過設(shè)計RRAM-based2X2可編程邏輯模塊來驗證替代的可行性,重點研究了RRAM-based布線結(jié)構(gòu)的編程算法,仿真其不同邏輯功能的實現(xiàn),并在SMIC130nm上流片驗證。
[Abstract]:With the development of logic technology, SOC has been widely developed and applied. As the most important component of SOC, embedded memory is becoming more and more important in SOC. Embedded memory is divided into volatile memory and non volatile memory according to its function. The volatile memory (SRAM) is used in the process of .65nm and below in the high speed parts such as computer cache because of its advantages of read and write speed. The influence of process fluctuation on the performance of SRAM is increasing day by day. The read and write index of SRAM can reflect the fluctuation of SRAM performance. It is the key parameter of SRAM performance. The SRAM read and write index is obtained by circuit design. The test structure based on SRAM storage node and the large array SRAM reading and writing index structure without SRAM memory node are designed respectively. The reading and writing index of SRAM under 65nm, The yield of 65nm SRAM array is predicted, which reflects the influence of 65nm process fluctuation on the performance of SRAM, and is verified by the upper flow sheet of SMIC65nm. Because of the poor compatibility between the traditional non-volatile memory and the standard logic process, the traditional non-volatile memory such as EEPROMU Flash antifuse can not be well followed by the process technology, so its application in FPGA is limited. The new non-volatile memory RRAM is small because of its non-volatile properties. The advantages of compatibility with standard CMOS logic process and low power consumption have attracted wide attention. The new memory RRAM can replace the traditional non-volatile memory in FPGA.First, it can directly replace the non-volatile memory such as PROMEEPROM, flash memory Flash and so on. In this paper, a single chip structure communication mode between non-volatile memory (RRAM) and volatile memory (SRAM) is proposed, and the communication circuit is analyzed. The second is to directly replace the anti-fuse Antifuse and other programming nodes, such as anti-fuse Antifuse, etc. In this paper, RRAM-based2X2 programmable logic module is designed to verify the feasibility of substitution. The programming algorithm of RRAM-based routing structure is studied, the realization of different logic functions is simulated, and the upper stream of SMIC130nm is verified.
【學(xué)位授予單位】：復(fù)旦大學(xué)
【學(xué)位級別】：碩士
【學(xué)位授予年份】：2012
【分類號】：TP333

【參考文獻(xiàn)】

相關(guān)期刊論文 前2條

1 金鋼;吳雨欣;張佶;黃曉輝;吳金剛;林殷茵;;基于0.13m標(biāo)準(zhǔn)邏輯工藝的1Mb阻變存儲器設(shè)計與實現(xiàn)[J];固體電子學(xué)研究與進(jìn)展;2011年02期

2 薛霆;李紅;;嵌入式存儲器發(fā)展現(xiàn)狀[J];中國集成電路;2007年10期

相關(guān)博士學(xué)位論文 前1條

1 薛曉勇;新型存儲器在FPGA中應(yīng)用的關(guān)鍵技術(shù)研究[D];復(fù)旦大學(xué);2011年

，

本文編號：1680416