本文關(guān)鍵詞： 按內(nèi)容尋址存儲(chǔ)器 軟錯(cuò)誤 漢明距離 匹配線 校驗(yàn)位　出處：《大連理工大學(xué)》2014年碩士論文　論文類型：學(xué)位論文

【摘要】：CAM,即按內(nèi)容尋址存儲(chǔ)器,它一方面擁有傳統(tǒng)存儲(chǔ)器的讀寫功能,另一方面它具有自身所獨(dú)有的并行高速搜索功能。它可以在一個(gè)周期內(nèi)得出搜索結(jié)果,比其他基于硬件的和基于軟件的搜索方案速度都要快,因此被廣泛地用于高速數(shù)據(jù)搜索的應(yīng)用中,如路由器中的查找表、數(shù)據(jù)壓縮、圖像處理等。但是,隨著網(wǎng)絡(luò)技術(shù)的飛速發(fā)展,網(wǎng)絡(luò)流量每年至少要翻一番,光纖技術(shù)的發(fā)展、新特性網(wǎng)絡(luò)應(yīng)用的出現(xiàn)也要求路由器對(duì)數(shù)據(jù)包的處理、轉(zhuǎn)發(fā)速度不斷提高,因此高速CAM的研究變得越來(lái)越重要。 另外,占CAM大部分面積的存儲(chǔ)單元易受a粒子和中子的輻射發(fā)生軟錯(cuò)誤。又由于CAM工作時(shí)所有的字電路同時(shí)啟動(dòng),大量匹配線的同時(shí)開關(guān)引起很大的地線反彈噪聲從而降低了電路的操作電壓,因此CAM的抗軟錯(cuò)誤能力相比普通存儲(chǔ)器更低。同時(shí),隨著集成電路制造工藝的發(fā)展,晶體管的尺寸越來(lái)越小,導(dǎo)致存儲(chǔ)單元對(duì)粒子輻射更加敏感。因此,CAM的抗軟錯(cuò)誤研究也變得越來(lái)越緊迫。 鑒于此,本文提出了一種高速、抗一位軟錯(cuò)誤的CAM方案。首先本方案采用的是基于電荷重利用的下匹配線敏感方案,其特點(diǎn)為速度快、功耗低、并且搜索速度隨失配位數(shù)的增加而加快,特別適合抗軟錯(cuò)誤電路設(shè)計(jì)；其次,每個(gè)CAM字增加了校驗(yàn)碼單元,增加后碼字間最小漢明距離增大。對(duì)于CAM來(lái)講,這意味著原碼的一位失配變?yōu)槎辔皇?由匹配線特點(diǎn)可知增加校驗(yàn)碼后CAM搜索速度加快；另外,由于碼間漢明距離增大,匹配字和失配字在發(fā)生一位軟錯(cuò)誤時(shí)的情況會(huì)區(qū)分開來(lái),本方案使用一個(gè)Dummy CAM字的敏感輸出作為控制信號(hào),實(shí)現(xiàn)了抵抗一位軟錯(cuò)誤。 基于本方案思想,文中在130nm1.2V標(biāo)準(zhǔn)CMOS工藝下實(shí)現(xiàn)了一個(gè)64W×153Bit的CAM,153位中,9位為校驗(yàn)碼。其搜索速度為0.7ns,匹配線功耗為0.97fJ/bit/Search。漢明編碼器導(dǎo)致的面積增加為773.7umx83.6um,存儲(chǔ)校驗(yàn)碼的CAM單元導(dǎo)致的面積增加為5.8%。
[Abstract]:On the one hand, it has the function of reading and writing of traditional memory, on the other hand, it has its own unique parallel high-speed search function, it can get the search results in a period. Faster than other hardware-based and software-based search schemes, it is widely used in high-speed data search applications, such as lookup tables in routers, data compression, image processing, etc. With the rapid development of network technology, network traffic must at least double every year. With the development of optical fiber technology, the emergence of new characteristics of network applications also requires routers to deal with data packets, forwarding speed continues to improve. So the research of high-speed CAM becomes more and more important. In addition, memory cells that account for most of the CAM area are vulnerable to soft errors due to radiation from particles a and neutrons, and because all word circuits in CAM work at the same time. A large number of matching lines at the same time the switch caused a lot of ground line rebound noise, thus reducing the circuit operating voltage, so the CAM has lower anti-soft error ability than the ordinary memory. At the same time. With the development of integrated circuit manufacturing technology, the size of transistor becomes smaller and smaller, which makes memory cell more sensitive to particle radiation, so the research of anti-soft error in CAM becomes more and more urgent. In view of this, this paper proposes a high speed, one bit soft error resistant CAM scheme. Firstly, this scheme uses a lower matching line sensitive scheme based on charge reuse, which is characterized by high speed and low power consumption. And the search speed is accelerated with the increase of the mismatch bit, which is especially suitable for the design of anti-soft error circuit. Secondly, each CAM word adds a check code unit, which increases the minimum hamming distance between code words. For CAM, this means that one bit mismatch of the original code becomes multi-bit mismatch. According to the characteristic of matching line, the speed of CAM search is quickened by adding check code. In addition, due to the increase of the hamming distance between codes, the matching word and the mismatch word will be distinguished when a bit soft error occurs. In this scheme, the sensitive output of a Dummy CAM word is used as the control signal. Implemented to resist a soft error. Based on the idea of this scheme, a 64W 脳 153Bit CAM-153 bit is implemented in 130nm 1.2V standard CMOS process. The search speed is 0.7 ns. The power consumption of the matching line is 0.97fJ / bit / Search. the hamming encoder increases the area to 773.7umx83.6um. The CAM unit that stores the check code increases the area to 5.8.
【學(xué)位授予單位】：大連理工大學(xué)
【學(xué)位級(jí)別】：碩士
【學(xué)位授予年份】：2014
【分類號(hào)】：TP333

【參考文獻(xiàn)】

相關(guān)期刊論文 前1條

1 孫巖;張甲興;張民選;郝躍;;Reducing vulnerability to soft errors in sub-100 nm content addressable memory circuits[J];半導(dǎo)體學(xué)報(bào);2010年02期

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本文編號(hào)：1484487