基于Butterfly網(wǎng)絡(luò)的移數(shù)和p序置換統(tǒng)一架構(gòu)研究與實(shí)現(xiàn)
發(fā)布時(shí)間:2018-02-01 17:41
本文關(guān)鍵詞: Butterfly網(wǎng)絡(luò) 路由算法 移數(shù)置換 p序置換 多路并行 出處:《電子技術(shù)應(yīng)用》2014年07期 論文類(lèi)型:期刊論文
【摘要】:為有效解決目前移數(shù)置換和p序置換硬件實(shí)現(xiàn)方式并行性和靈活性差、功能擴(kuò)展性不強(qiáng)的問(wèn)題,研究了Butterfly網(wǎng)絡(luò)的特點(diǎn),設(shè)計(jì)并實(shí)現(xiàn)了基于Butterfly網(wǎng)絡(luò)的移數(shù)和p序置換的統(tǒng)一架構(gòu),分析并提取出支持該架構(gòu)的路由算法。與傳統(tǒng)對(duì)數(shù)移位器和桶形移位器相比,本架構(gòu)并行性更好,靈活性更高,功能擴(kuò)展性更強(qiáng),同時(shí)支持短字置換和多路并行操作。與I-BFLY移位器相比,架構(gòu)面積節(jié)省了30.0%且速度提升了17.6%。
[Abstract]:In order to solve the problem of poor parallelism, flexibility and function expansibility in the hardware implementation of shift permutation and p-order permutation, the characteristics of Butterfly network are studied. The uniform architecture of shift number and p-order permutation based on Butterfly network is designed and implemented, and the routing algorithm supporting this architecture is analyzed and extracted, which is compared with the traditional logarithmic shifter and bucket shifter. Compared with I-BFLY shifter, this architecture has better parallelism, higher flexibility, stronger function expansibility and supports short word permutation and multiplex parallel operation. The architecture area was saved by 30.0% and the speed increased by 17.6%.
【作者單位】: 解放軍信息工程大學(xué);
【分類(lèi)號(hào)】:TP332
【正文快照】: 移數(shù)置換和p序置換是芯片設(shè)計(jì)中的兩種重要置換。移數(shù)置換用于實(shí)現(xiàn)處理器中移位功能,是完成地址產(chǎn)生和算術(shù)邏輯運(yùn)算等功能必不可少的部分。p序置換廣泛應(yīng)用于數(shù)據(jù)加密、圖像處理和數(shù)字信號(hào)處理等領(lǐng)域,是完成數(shù)據(jù)擴(kuò)散的重要方法。隨著微電子技術(shù)的不斷進(jìn)步,特別是芯片可重構(gòu)技,
本文編號(hào):1482448
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