本文關(guān)鍵詞： RTEMS 嵌入式系統(tǒng) JAVA處理器 SPARC 異構(gòu)多核　出處：《哈爾濱工業(yè)大學(xué)》2012年碩士論文　論文類型：學(xué)位論文

【摘要】：受物理極限和功耗散熱等原因的限制，，處理器工作頻率的提升遇到了瓶頸�，F(xiàn)在人們逐漸轉(zhuǎn)向新的方式來進一步提高處理器的性能，比如在單個芯片上集成多個處理器核，于是同構(gòu)和異構(gòu)的多處理器系統(tǒng)越來越多地被設(shè)計出來。采用傳統(tǒng)的解釋執(zhí)行的方式大大降低了JAVA程序的運行效率，對JVM的依賴又要求占用系統(tǒng)中大量的內(nèi)存空間。這些原因都限制了JAVA程序在嵌入式系統(tǒng)中的性能提升，甚至阻礙了其廣泛應(yīng)用。JAVA處理器的出現(xiàn)有效地解決了這個問題。為使JAVA程序和其他程序都能在一個平臺在高效地執(zhí)行，基于SPARC架構(gòu)的JAVA加速系統(tǒng)就在這種背景下產(chǎn)生了。它是一個異構(gòu)多核體系的嵌入式系統(tǒng)，其內(nèi)部包含了一個（或多個）SPARC通用核以及一個（或多個）JAVA處理器。 基于RTOS進行嵌入式應(yīng)用程序的開發(fā)，有助于代碼的可重用性，可大大提高系統(tǒng)開發(fā)效率。同時，RTOS封裝了復(fù)雜的嵌入式硬件信息，為開發(fā)人員提供了一個簡單的程序開發(fā)接口。RTEMS是一個廣為流行的實時嵌入式系統(tǒng)，具有內(nèi)核精簡、執(zhí)行效率高、穩(wěn)定性高等優(yōu)良特性。它支持多種結(jié)構(gòu)的處理器，尤其對異構(gòu)多核系統(tǒng)也提供了相應(yīng)的支持�；赗TEMS，整合現(xiàn)有的SPARC通用核及JAVA核的開發(fā)工具集，我們提出了一個面向JAVA加速系統(tǒng)的綜合驅(qū)動方案。采用本方案，可方便有效地進行面向JAVA加速系統(tǒng)的程序開發(fā)。 本文介紹了RTEMS的體系結(jié)構(gòu)及其多任務(wù)管理機制，深入研究了RTEMS對異構(gòu)多核系統(tǒng)的支持機制及其多處理器通信接口的設(shè)計。在分別對SPARC通用核和JAVA核程序開發(fā)模式深入研究的基礎(chǔ)上，整合現(xiàn)有的工具集，提出了基于RTEMS實時嵌入式系統(tǒng)的面向JAVA加速系統(tǒng)的整體驅(qū)動方案設(shè)計。隨后，本文簡單介紹了Xilinx FPGA仿真實現(xiàn)技術(shù)，并借助該技術(shù)搭建了JAVA加速系統(tǒng)的目標(biāo)測試平臺，分別對SPARC通用核開發(fā)方案和JAVA核開發(fā)方案進行了可用性和可擴展性的測試。最后，本文基于現(xiàn)有測試平臺對JAVA加速系統(tǒng)的SPARC通用核進行了Dhrystone性能基準(zhǔn)測試，證明了本系統(tǒng)的設(shè)計滿足了課題初定的性能需求指標(biāo)。
[Abstract]:Due to the limitation of physical limit and power dissipation, the improvement of processor working frequency has encountered a bottleneck. Now people are gradually turning to new ways to further improve the performance of the processor. For example, multiple processor cores are integrated on a single chip. As a result, isomorphic and heterogeneous multiprocessor systems are designed more and more. The traditional way of interpretation and execution greatly reduces the efficiency of JAVA programs. The dependence on JVM also requires a large amount of memory space in the system. These reasons limit the performance of JAVA programs in embedded systems. Even hindering its widespread use of .Java processors to effectively solve this problem. In order to make JAVA programs and other programs can be executed efficiently on a platform. The JAVA acceleration system based on SPARC architecture is produced under this background. It is an embedded system of heterogeneous multi-core system. It contains one (or more) SPARC common core and one (or more) Java processors. The development of embedded application based on RTOS is helpful to the reusability of code and greatly improves the efficiency of system development. At the same time, it encapsulates the complex embedded hardware information. It provides a simple program development interface. RTEMS is a popular real-time embedded system with a compact kernel and high execution efficiency. It supports a variety of processors, especially for heterogeneous multicore systems. It is based on RTEMS. By integrating the existing SPARC general-purpose kernel and the JAVA kernel development tool set, we propose a comprehensive drive scheme for JAVA acceleration system, which adopts this scheme. Program development for JAVA acceleration system can be carried out conveniently and effectively. This paper introduces the architecture of RTEMS and its multi-task management mechanism. The support mechanism of RTEMS for heterogeneous multi-core system and the design of multi-processor communication interface are studied in detail. Based on the research of SPARC universal core and JAVA kernel program development mode respectively. Based on the existing toolset, the design of the whole driver for the JAVA acceleration system based on the RTEMS real-time embedded system is proposed. In this paper, the Xilinx FPGA simulation technology is briefly introduced, and the target test platform of JAVA acceleration system is built with the help of this technology. The usability and extensibility of SPARC general nuclear development scheme and JAVA nuclear development scheme are tested respectively. Finally. In this paper, based on the existing test platform, the Dhrystone performance benchmark of the SPARC general core of the JAVA acceleration system is tested. It is proved that the design of the system meets the performance requirements initially set by the subject.
【學(xué)位授予單位】：哈爾濱工業(yè)大學(xué)
【學(xué)位級別】：碩士
【學(xué)位授予年份】：2012
【分類號】：TP332

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