本文關(guān)鍵詞： SRAM單元 九管 穩(wěn)定性 靜態(tài)噪聲容限 漏電流　出處：《西安電子科技大學(xué)》2013年碩士論文　論文類(lèi)型：學(xué)位論文

【摘要】：當(dāng)前SoC系統(tǒng)中為了提高系統(tǒng)性能都會(huì)內(nèi)嵌各種存儲(chǔ)器，，尤其是靜態(tài)隨機(jī)存取存儲(chǔ)器電路由于兼容標(biāo)準(zhǔn)的CMOS工藝成為嵌入式存儲(chǔ)器的首選。這些存儲(chǔ)單元不論是在芯片面積還是功耗上都占有非常大的比重，它們的性能決定了整個(gè)系統(tǒng)的性能。在SoC系統(tǒng)中設(shè)計(jì)一塊高性能的SRAM電路是至關(guān)重要的。 傳統(tǒng)的六管SRAM存儲(chǔ)單元，采用直接存取機(jī)理進(jìn)行讀操作。在讀操作過(guò)程中，數(shù)據(jù)存儲(chǔ)點(diǎn)通過(guò)存取晶體管直接與位線相接，由于分壓和外部噪聲的影響，存儲(chǔ)的數(shù)據(jù)很不穩(wěn)定。改良型的七管SRAM單元結(jié)構(gòu)特別針對(duì)六管SRAM單元讀操作破壞問(wèn)題，采用數(shù)據(jù)存儲(chǔ)點(diǎn)與位線分離的方法，消除了電壓分壓以及外部噪聲的問(wèn)題，其穩(wěn)定性得到顯著提升。然而，由于只有一個(gè)存取NMOS管用于寫(xiě)操作，加上閾值電壓損失的作用，其寫(xiě)操作的穩(wěn)定性及速度不能達(dá)到要求。 本文研究了一種新型的九管SRAM單元，很好地解決了六管的讀操作破壞問(wèn)題和七管SRAM單元的寫(xiě)操作問(wèn)題，并且運(yùn)用HSPICE軟件對(duì)這幾種SRAM單元結(jié)構(gòu)的讀操作延時(shí)、寫(xiě)操作余量、靜態(tài)噪聲容限、漏電流和動(dòng)態(tài)功耗進(jìn)行了仿真分析。結(jié)果表明九管SRAM單元具有較快的讀寫(xiě)速度和更好的穩(wěn)定性。
[Abstract]:In order to improve the system performance, various kinds of memory are embedded in the current SoC system. In particular, static random access memory circuits have become the first choice for embedded memory due to their compatibility with standard CMOS technology. These memory cells occupy a very large proportion in both chip area and power consumption. Their performance determines the performance of the whole system. It is very important to design a high performance SRAM circuit in SoC system. The traditional six-transistor SRAM memory cell uses direct access mechanism to read. During the read operation, the data storage point is connected directly to the bit line through the access transistor, because of the influence of the partial voltage and the external noise. The data stored is very unstable. The improved seven-tube SRAM cell structure is especially aimed at the destruction of the read operation of the six-tube SRAM unit, and the method of separating the data storage points from the bit line is adopted. The stability of the system is greatly improved by eliminating the problem of voltage partitioning and external noise. However, due to the fact that only one access NMOS tube is used for write operation, the loss of threshold voltage is added. Its write operation stability and speed can not meet the requirements. In this paper, a new type of nine-tube SRAM unit is studied, which can solve the problem of read operation destruction of six tubes and write operation of SRAM unit with seven tubes. And the read delay, write operation allowance and static noise tolerance of these SRAM unit structures are obtained by using HSPICE software. The leakage current and dynamic power consumption are simulated and analyzed. The results show that the nine-transistor SRAM cell has faster read / write speed and better stability.
【學(xué)位授予單位】：西安電子科技大學(xué)
【學(xué)位級(jí)別】：碩士
【學(xué)位授予年份】：2013
【分類(lèi)號(hào)】：TP333

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本文編號(hào)：1459482